IP encryption

February 27, 2015

Getting the most out of IP based FPGA design with Synplify

How Synplify makes it easier to use IP in FPGA-based designs, and package your own IP for secure reuse, on Altera and Xilinx devices
Article  |  Topics: IP - Assembly & Integration, Design Management  |  Tags: , , , , ,   |  Organizations:
April 28, 2014

Protecting IP in a collaborative signoff environment

The encryption chain for today's highly collaborative designs needs to be managed with care.
December 1, 2005

IP protection under OASIS

Companies and mask shops already have plans and policies to secure the storage and transmission of sensitive layout VLSI data. These include confidentiality and non-disclosure agreements, and encryption. However, traditional VLSI file formats such as GDSII never popularized the type of constructs that facilitate intellectual property (IP) protection. The OASIS format does have these constructs. […]

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