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September 8, 2017
How HLS is giving shape to glasses-free 3DTV
High level synthesis (HLS) was adopted to realize innovative display IP as developed by a small core engineering team.
Article | Topics:
IP - Assembly & Integration
,
Design Management
,
EDA - ESL
,
IC Implementation
| Tags:
C++
,
graphics processor
,
RTL generation
,
tradeoffs
,
video processor
| Organizations:
Mentor
,
SeeCubic
EDA Topics
DFM
DFT
ESL
IC Implementation
Verification
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