FPGA prototyping

May 24, 2014
Mick Posner is Director of Product Marketing for Synopsys' FPGA-Based Prototyping Solutions.

Prototypers get faster route to first clock tick

ProtoCompiler understands HAPS FPGA prototyping hardware, so it can optimize logic placement and partitioning, even on designs with up to 250m ASIC gates.
Expert Insight  |  Topics: Embedded - Integration & Debug, EDA - Verification  |  Tags: , ,   |  Organizations:
March 24, 2014
HAPS-DX

Prototyping solutions for validation of complex ASIC IP

An in-depth look at the role of FPGA-based prototyping and the validation use cases it offers when integrating complex blocks.
Article  |  Topics: IP - Assembly & Integration, EDA - Verification  |  Tags: , ,   |  Organizations: ,
January 21, 2014
Cadence Palladium cluster

Productivity, predictability and versatility drive verification environments

Three key characteristics determine a verification platform's ability to add value to the design flow. But how they score within a project depend on how each is applied and at which point.
Article  |  Topics: EDA - Verification  |  Tags: , , ,   |  Organizations:
January 7, 2014
Neil Songcuan is a senior product marketing manager, responsible for the FPGA-based Prototyping Solution at Synopsys.

Using HAPS to streamline IP to SoC integration

The HAPS prototyping system can help designers integrate IP into SoCs more quickly.
Expert Insight  |  Topics: IP - Assembly & Integration, EDA - IC Implementation  |  Tags: , ,   |  Organizations:
December 16, 2013
Mick Posner is Director of Product Marketing for Synopsys' FPGA-Based Prototyping Solutions.

Consistency key to gaining the advantages of IP integration

Consistency is vital to IP integration strategies that rely on developing an SoC using a hierarchy of FPGA-based prototypes.
November 14, 2013
Cadence virtual prototyping

A map of the prototyping ecosystem

Different users within a design team will have varying needs for prototype capabilities. What type of prototype to pick is not always 100 per cent clear. Here are some pointers on how to make the choice.
Article  |  Topics: EDA - ESL, Verification  |  Tags: , , ,   |  Organizations:
October 23, 2013

FPGA-based prototyping to validate the integration of IP into an SoC

A case study describing validation of the integration of USB3.0 and USB2.0 interface IP that illustrates broader challenges FPGA-based prototyping presents.
Article  |  Topics: IP - Assembly & Integration, EDA - Verification  |  Tags: , ,   |  Organizations:
April 24, 2013
Mick Posner, Director of Product Marketing for Synopsys' FPGA-Based Prototyping Solutions.

IP-to-SoC prototyping demands consistency

Many problems arise during the IP-to-SoC phase of FPGA-based prototyping due to the mix-and-match nature of the prototypes not the actual designs.
Expert Insight  |  Topics: IP - Assembly & Integration, - EDA Topics, IP Topics, EDA - Verification  |  Tags: , ,   |  Organizations: ,
July 5, 2012

Improving ASIC prototyping on multiple FPGAs through better partitioning

Using a new design-partitioning tool and stacked-silicon interconnect FPGA to develop an ASIC prototyping platform that can be reprogrammed several times a day.
Article  |  Topics: EDA - DFM  |  Tags: , , ,   |  Organizations: ,
April 24, 2012

What can FPGA-based prototyping do for you?

This extract from the Synopsys and Xilinx-authored "FPGA-Based Prototyping Methodology Manual" outlines a number of valuable strategies supported by brief project case studies.

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