Design Management

April 4, 2013
Michael Sanie, Synopsys

Debugging the debug challenge

Debug of logic and testbench debug makes up 35% of chip design, and is growing as power-management and hardware/software issues become part of the task.
Expert Insight  |  Topics: IP - Design Management, EDA - Verification  |  Tags: , , ,   |  Organizations:
August 23, 2012
Pranav Ashar

Verification challenges require surgical precision

The verification challenge is best addressed by a combination of highly targeted tools, according to Pranav Ashar, CTO of Real Intent.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , , ,   |  Organizations:
August 6, 2012
tdf-aug12-mentor-pcb-feat

Concurrent design: one team, one virtual location

Speeding up electronics design by learning lessons in increasing parallelism from computer science.
July 26, 2012
Cloud image

Optimizing cloud computing for faster semiconductor design

How Cadence, Intel and Xuropa accelerated the semiconductor design process by squeezing 15% more capacity out of a virtualized server farm
March 1, 2009

A profitable discipline

The software food chain Software has become a ubiquitous part of many products and services, some of which are distributed and used on a massive scale. Think of cloud computing, online banking and the engines for today’s cellphones and cameras. Competition requires that such new products are developed more quickly than ever before and yet […]

Article  |  Topics: Embedded - Integration & Debug  |  Tags: ,
December 1, 2008

License to profit

Guy Haas Managing EDA software involves more than monitoring and studying usage across various tools and features. An effective approach will help the enterprise reduce engineering software costs, reach better and more informed business decisions, become more responsive and ensure compliance with software licenses. To understand how to develop such strategies, we need to look […]

Article  |  Topics: EDA - IC Implementation  |  Tags: ,

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