DDR3

April 15, 2015
AIDT allows automated timing-alignment of PCB traces

Layout automation and simulation support DDR4 at lower system cost

The introduction of the DDR4 memory-bus standard will allow system designers to meet aggressive performance targets for their next-generation systems. But the changes required to support the higher datarates of DDR4 place stringent demands on the PCB designer.
Article  |  Topics: PCB - Design Integrity, Layout & Routing  |  Tags: , , ,   |  Organizations:
December 1, 2008

No double-quick growth for DDR3

Lane Mason Marc Greenberg DDR3 DRAMs still languish around the edges of the market despite their supposed attraction in terms of power and performance, the widespread availability of product, and the presence of a supposedly ‘evolved’ ecosystem and implementation infrastructure. Just over 18 months ago, Intel launched a major Go To DDR3 market initiative at […]

Article  |  Topics: Embedded - Platforms  |  Tags: , ,   |  Organizations:

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