coverage

December 5, 2017
Ashish Darbari is director of product management at OneSpin Solutions.

Doc Formal: the crisis of confidence facing verification III

Ashish Darbari concludes his series on the need for new verification strategies by considering Debug and Signoff & Review.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , , , , , ,   |  Organizations:
April 26, 2017
Sanjana Bhattacharya

Eight tips for performing effective unreachability analysis

Unreachability analysis can help find design code that can never be executed, helping verification engineers refine their coverage goals.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , ,   |  Organizations:
March 28, 2017
Anders Nordstrom, senior corporate applications engineer, Verification Group, Synopsys

Are you testing your test?

Using formal core coverage to understand the effectiveness of formal coverage verification strategies in SoC design.
October 19, 2015
Nasib Naser is senior staff corporate applications engineer in the verification group for Synopsys.

Ten key tips for effective memory verification

Verification IP can help verify that memory-controller implementations meet standards; test an implementation against specific memories; and drive traffic for SoC verification and power analysis. Here's how to choose it.
Expert Insight  |  Topics: IP - Selection, EDA - Verification  |  Tags: , , , , ,   |  Organizations:
June 30, 2015
Mark Handover is an applications engineer with Mentor Graphics

Back to basics – doing formal the right way

Considering design style, assertions, engines and coverage can help ease the development of an effective formal verification test plan
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , ,   |  Organizations:

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