big.LITTLE

October 6, 2014
Power grid signal track blocking

ARM, TSMC design explores 16nm finFET issues

ARM and TSMC used an extensive pre-planning process, including a static analysis of each module's overall logic structure, to put together a 2.3GHz processor design based around ARM's main 64bit Big.Little pairing for the foundry's 16nm finFET process.
Article  |  Topics: EDA - IC Implementation  |  Tags: , , , , ,   |  Organizations: ,
February 4, 2014
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Debugging with virtual prototypes – Part Four

The fourth installment discusses the extra levels of debug capability available when using virtual prototypes through the example of an ARM big.LITTLE-based embedded system.
January 15, 2014
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Debugging with virtual prototypes – Part Three

This part illustrates the technique using examples addressing memory corruption, multicore systems and cache coherency with particular reference to watchpoints.

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