analog

December 22, 2017
feat-im-in-design-DRC

Improve custom/AMS design and productivity with in-design DRC

In-design DRC is a technique that frees up engineers from many of the challenges of delivering AMS design under ever more complex design rules.
Article  |  Topics: EDA - IC Implementation, - Uncategorized  |  Tags: , , , , , ,   |  Organizations:
March 15, 2017
DVCon China takes place at the Parkyard Hotel, Shanghai on April 19th.

DVCon China launches this April in Shanghai

DVCon China general chair Andy Liu discusses Accellera’s new addition to its design and verification conference series (简体中文).
Expert Insight  |  Topics: EDA - ESL, IC Implementation, Verification  |  Tags: , , , , , , ,   |  Organizations: , , ,
March 15, 2017
DVCon China takes place at the Parkyard Hotel, Shanghai on April 19th.

DVCon中国将于4月在上海亮相

DVCon中国大会主席刘红亮讨论了Accellera新增的DVCon中国ASIC设计和验证会议的看点。
Article  |  Topics: Uncategorized  |  Tags: , , , , , , ,   |  Organizations: , , ,
December 9, 2016
Featured image - analog design constraints

A new path for analog design constraints verification

Traditional techniques are being challenged by shortening design cycles and the effects of later process nodes.
Article  |  Topics: EDA - IC Implementation, Verification  |  Tags: , , ,   |  Organizations:
October 28, 2015
Bruce McGaughy, CTO, ProPlus Design Solutions

FastSPICE simulators hit their expiration date

Although FastSPICE simulators are in almost every design flow, requirements are moving beyond the capabilities they can provide. Parallel processing provides a solution.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , ,   |  Organizations:
September 10, 2014
John Ferguson is the director of marketing for Calibre DRC applications at Mentor Graphics. John has worked extensively in the area of physical design verification for the manufacture of leading edge integrated circuits.

If we’d only known then what we know now

Innovation in physical verification is driven by incoming nodes but new tools and features can and should be fed back up the technology chain.
Expert Insight  |  Topics: EDA - DFM, Verification  |  Tags: , , , ,   |  Organizations:

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