40nm

October 18, 2014
Soft-blocked floorplan

Placement optimizations push power and clock on Cortex-M7 project

Soft blocking to prevent cell spreading and other placement-optimization techniques helped improve power and clock speed on a Cortex-M7 test chip designed by ARM and Cadence.
October 2, 2013

Catching layout-dependent effects on-the-fly

New layout-dependent effects (LDEs) arise at each process node. This methodology updates LDE parameters and uses on-the-fly simulation for early detection.
Article  |  Topics: EDA - DFM, IC Implementation  |  Tags: , , , ,   |  Organizations:
June 1, 2010

First fabless, now labless

Product engineering services can be efficiently outsourced and even the biggest players are doing it, says Michel Villemain
Article  |  Topics: EDA - DFM  |  Tags: , ,

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors