3DIC

March 29, 2018
Two wafers fabbed at Imec

3DIC technology provides performance boosts

3D integration technology has split into a number of different approaches, each of which brings a different combination of benefits in terms of performance.
Article  |  Topics: IP - Assembly & Integration, EDA - DFM  |  Tags: , ,   |  Organizations:
September 23, 2015

Mounting Fiji: How AMD realized the first volume interposer

AMD's Radeon R9 family is the result of eight years developing 3D-IC and interposer technology. What lessons did the company learn?
Article  |  Topics: EDA - DFM, DFT, IC Implementation  |  Tags: , , , , , , ,   |  Organizations: , , , ,
September 10, 2014

If we’d only known then what we know now

Innovation in physical verification is driven by incoming nodes but new tools and features can and should be fed back up the technology chain.
Expert Insight  |  Topics: EDA - DFM, Verification  |  Tags: , , , ,   |  Organizations:
August 7, 2014
Hitendra Divecha is senior product marketing manager at Cadence Design Systems

Dealing with parasitic-extraction challenges in finFETs and advanced nodes

FinFET and 3DIC technologies bring with them not just higher performance but an increased need for accurate parasitic analysis.
Expert Insight  |  Topics: EDA - IC Implementation, Verification  |  Tags: , , ,   |  Organizations:
July 15, 2014

Parasitic extraction

Parasitic extraction reveals the impact of implementation on the theoretical performance of IC designs.
June 22, 2014
Preview image for monolithic 3D integration

Monolithic 3DIC for SoC

Monolithic 3DIC integration may provide a viable alternative to conventional 2D scaling for SoCs if manufacturing problems can be overcome.
June 18, 2014
Parasitic Extraction Featured Image

Full 3D-IC parasitic extraction

How to enhance an 'ideal' parastitic extraction strategy to create a full 3D assembly-level parasitic netlist for simulation and circuit analysis.
Article  |  Topics: EDA - DFM  |  Tags: , ,   |  Organizations:
April 8, 2014
Randall Myers is an Xpedition Flow technical marketing engineer at Mentor Graphics

Straighten up and fly right

Fighter pilots have long trusted highly sophisticated automation. That’s how you can meet the challenges posed by advanced PCB design techniques.
October 11, 2013
Mentor Power Grid article featured image

Power grid analysis for 2.5D and 3D IC systems

PGA has been IC-centric for mainstream 2D configurations. It must become system-centric for 2.5D and 3D systems.
Article  |  Topics: EDA - DFM, IC Implementation  |  Tags: , , ,   |  Organizations:
September 24, 2013
Hybrid memory cube architecture

DRAM interfaces for mobile and networking designs

Mobile and networking platforms need high bandwidth, low power consumption, and small footprint. These needs drove standards, such as LPDDR4, Wide I/O 2 and Hybrid Memory Cube.
Article  |  Topics: IP - Selection  |  Tags: , , , , , , ,   |  Organizations:

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors