Synopsys

October 8, 2015
Amol Herlekar, Synopsys

Preparing for low-power verification success: setting objectives and measuring outcomes

A look at what it takes to verify low-power SoC designs, including setting objectives and measuring outcomes in a UPF-driven verification strategy
Expert Insight  |  Topics: IP - Design Management, EDA - Verification  |  Tags: , ,   |  Organizations: ,
September 28, 2015

FPGA-based prototyping 2: Understand the real cost

Part two of our series on FPGA-based prototyping looks at two critical factors to address before a project begins: budgeting and high-level implementation.
September 7, 2015

FPGA-based prototyping 1: What’s all this buzz about?

This multi-part series addresses various aspects of FPGA-based prototyping. Future installments will address budgeting and implementation, but we start by looking at why the technique is generating so much interest.
August 26, 2015
Gervais Fong is a senior product manager for mixed-signal PHY IP at Synopsys.

USB Type-C: easier for users, harder for designers

Implementing the reversible connector of USB Type-C demands a rethink of the PHY architecture to achieve the most cost-effective IP solution
Expert Insight  |  Topics: IP - Selection  |  Tags: , , , ,   |  Organizations:
August 19, 2015
Jai Durgam, Synopsys

Make vs buy in automotive IP

A look at some of the quality and safety requirements that must be met when developing and applying semiconductor IP to the automotive sector.
Expert Insight  |  Topics: IP Topics, IP - Selection, EDA - Verification  |  Tags: , , , , , ,   |  Organizations:
August 7, 2015

Improving functional safety of automotive systems using virtual prototyping

The increasing complexity of automative software is challenging the ability of established software testing strategies to demonstrate its functional safety. Here's how virtual prototyping can help.
Article  |  Topics: EDA - Verification  |  Tags: , , , , , ,   |  Organizations:
August 4, 2015
Mick Posner is Director of Product Marketing for Synopsys' FPGA-Based Prototyping Solutions.

Building better debug facilities for bigger FPGA-based prototypes

The introduction of bigger FPGAs enables more complex prototypes - but makes debugging more of a challenge. Here's one way to address the issue.
Expert Insight  |  Topics: EDA - Verification  |  Tags: ,   |  Organizations: ,
June 22, 2015

Verifying MIPI interfaces in SoCs

Verifying MIPI interfaces including CSI-2, CPHY, DPHY, MPY, Unipro and the UFS host controller on complex SoCs - should you make or buy the necessary VIP?
Article  |  Topics: IP - Selection, EDA - Verification  |  Tags: , , , , , , , ,   |  Organizations: ,
June 17, 2015
Joe Mallett is senior manager, product marketing for FPGA-based synthesis software tools at Synopsys.

Eight tips for choosing your next FPGA tool

Eight issues to consider when choosing an FPGA tool, including risk minimisation, routing issues, ability to iterate, IP freedom and more
Expert Insight  |  Topics: EDA Topics  |  Tags: , ,   |  Organizations:
May 6, 2015

Fixing late ECOs in ARM core subsystems at STMicroelectronics

Using equivalence checking to validate ECOs in ARM core subsystem development at STMicroelectronics

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