Synopsys

March 24, 2016
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True random number generators for a more secure IoT

An analysis of what it takes to build true random number generators that can provide a strong cryptographic basis for systems security, especially for IoT devices.
March 21, 2016
Manuel Mota, technical marketing manager, Bluetooth IP, Synopsys

Enabling energy-efficient wireless IoT designs with Bluetooth Smart IP

A quick look at Bluetooth Smart and how it can be used to provide network connections in certain classes of IoT application.
Expert Insight  |  Topics: IP Topics, IP - Selection  |  Tags: , ,   |  Organizations:
March 9, 2016
Nissan Leaf electric car

Case study: Analyzing an electric vehicle powertrain using virtual FMEA

How the powertrain of an electric vehicle is modeled first in software, then elaborated using virtual hardware running target code, to enable virtual FMEA with rich data-gathering and analysis capabilities.
Article  |  Topics: EDA - Verification  |  Tags: , , , ,   |  Organizations:
March 1, 2016
Visual: cars speeding along a road

FMEA in automotive software development using virtual prototyping, physical modeling and simulation

How fault mode and effect analysis (FMEA) can be performed on a virtual prototype of an automotive system containing mechanical, electrical, analog and digital models, including the microcontroller running the same software as will be used in the car.
Article  |  Topics: EDA - Verification  |  Tags: , , , ,   |  Organizations:
March 1, 2016
Anders Nordstrom, senior corporate applications engineer, Verification Group, Synopsys

Exploiting the power of reset in formal verification

The reset state of a design can have a huge impact on the scope and correctness of verification, especially when formal techniques are applied.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , ,   |  Organizations:
February 22, 2016
ICCII floorplanning article - featimg

Floorplanning complex SoCs with multiple levels of physical hierarchy

How to work with multiple levels of physical hierarchy when floorplanning multicore, multiport, multi-million gate SoCs
February 10, 2016
Geoffrey Ying, director of product marketing, AMS group, Synopsys

Speeding AMS verification by easing simulation debug and analysis

How to ease AMS verification using tools that improve simulation debug, ease IP integration, and speed design analysis and centering
January 27, 2016
Dr Lauro Rizzatti, verification consultant

Hardware emulation answers Brooks’ Law

What can you add to a challenging project without pushing out deadlines and muddling communication?
January 20, 2016
End to end prototyping - featimg

Using end-to-end prototyping to reduce the impact of rising software content in SoCs

A look at using end-to-end prototyping to ease architecture development, hardware/software integration, and system validation in SoC designs
January 19, 2016
Anders Nordstrom, senior corporate applications engineer, Verification Group, Synopsys

Reachable or reached, covered or coverable – is it just semantics?

How code coverage and reachability analysis differ between simulation and formal verification techniques, and ways to use that to advantage.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , ,   |  Organizations:

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