Synopsys

August 28, 2016
Chips on a wafer

Addressing the verification challenges of complex SoCs

Three senior verification specialists talk about how they are navigating the challenge of verifying multibillion-transistor SoCs with limited compute resource, increasing coverage demands and shrinking timescales.
July 29, 2016
IoT and root of trust diag 5 featimg

Hardware roots of trust for IoT security

IoT security is critical. Embedding a root of trust in hardware can provide the firm foundation necessary for a more secure IoT implementation.
July 22, 2016
Dr Lauro Rizzatti, verification consultant

The emulator thrives as verification models mushroom

Emulators have come a long way since their first introduction nearly three decades ago.
July 13, 2016
Hezi Saar is a staff product marketing manager at Synopsys responsible for its DesignWare MIPI controller and PHY IP product line.

I3C specification updates I2C for sensor subsystems

A look at the ways in which the I2C serial interface specification is being updated to form I3C, and its use in sensor subsystems
Expert Insight  |  Topics: IP - Selection  |  Tags: , ,   |  Organizations: ,
July 5, 2016
Anders Nordstrom, senior corporate applications engineer, Verification Group, Synopsys

Are you formally secure?

A look at how formal verification strategies can be used to check the security feature of complex SoCs for potential data leakage and data integrity issues
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , ,   |  Organizations:
June 10, 2016
Mike Borza, Synopsys

Laying the foundations of a more secure IoT

The challenges of creating a more secure IoT, and the role that hardware roots of trust can play in doing so.
Expert Insight  |  Topics: Embedded - Architecture & Design  |  Tags: , , , ,   |  Organizations:
May 30, 2016
Anders Nordstrom, senior corporate applications engineer, Verification Group, Synopsys

Comparing your design to itself – a crucial part of verification

Sequential equivalence checking can help trap errors introduced by clock gate insertion, uninitialised registers, and X propagation issues.
May 23, 2016
Road signs used to train IDSIA neural network

Bit width tweaks point way to practical deep learning

In both data centers and automobiles deep learning is taking hold. But it is a technique that challenges conventional microprocessors, leading system designers to look at alternative architectures for acceleration.
May 10, 2016
USB Type C connector

Implementing USB Type-C

A look at three design challenges for USB Type-C: implementing two SuperSpeed datapaths on a reversible connector; partitioning the design to support multiple USB Type-C variants; and partitioning the management software.
April 20, 2016
Android logo

Accelerating Android bring-up using VDKs in the LAVA framework

Accelerating software testing is vital to speeding up embedded system development, especially for Android and Linux systems running on ARM-based hardware. Virtual prototyping strategies, including the use of VDKs, can help.
Article  |  Topics: Embedded - Integration & Debug, Platforms, EDA - Verification  |  Tags: , , , ,   |  Organizations: , ,

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