Synopsys

June 7, 2017
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Staging virtual prototype bring-up for faster software development

How staging virtual prototype bring-up can accelerate the development of embedded software in complex systems.
Article  |  Topics: Embedded - Integration & Debug, EDA - Verification  |  Tags: , , ,   |  Organizations:
May 24, 2017
Michael Thompson is the senior manager of product marketing for the DesignWare ARC processors at Synopsys

Building processors to enable intuitive human-machine interaction

The increasing complexity of human-machine interfaces is challenging processor designers to produce the necessary performance within a limited power budget
Expert Insight  |  Topics: IP - Selection  |  Tags: , , ,   |  Organizations:
May 9, 2017
John Swanson John Swanson is senior marketing manager for DesignWare IP at Synopsys.

Building faster data centers with 25G Ethernet

The rising bandwidth demands of data centres have driven the development of 25G Ethernet, which will also form a pathway to 100G.
Expert Insight  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , , , ,   |  Organizations: ,
April 26, 2017
Sanjana Bhattacharya

Eight tips for performing effective unreachability analysis

Unreachability analysis can help find design code that can never be executed, helping verification engineers refine their coverage goals.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , ,   |  Organizations:
April 21, 2017
Visual: cars speeding along a road

Accelerating the development of powertrain ECUs with virtual hardware

How virtual hardware can speed up many aspects of automotive system development, including architectural analysis, software development and verification
Article  |  Topics: Embedded - Integration & Debug, EDA - Verification  |  Tags: , , ,   |  Organizations:
April 4, 2017
template testCS5

Teaching computers to recognize a smile (or frown, or grimace or…)

Using deep learning techniques and convolutional neural networks to bring facial recognition capabilities to embedded systems.
March 15, 2017
DVCon China takes place at the Parkyard Hotel, Shanghai on April 19th.

DVCon China launches this April in Shanghai

DVCon China general chair Andy Liu discusses Accellera’s new addition to its design and verification conference series (简体中文).
Expert Insight  |  Topics: EDA - ESL, IC Implementation, Verification  |  Tags: , , , , , , ,   |  Organizations: , , ,
March 15, 2017
DVCon China takes place at the Parkyard Hotel, Shanghai on April 19th.

DVCon中国将于4月在上海亮相

DVCon中国大会主席刘红亮讨论了Accellera新增的DVCon中国ASIC设计和验证会议的看点。
Article  |  Topics: Uncategorized  |  Tags: , , , , , , ,   |  Organizations: , , ,
March 7, 2017
Angela Raucher is product line manager for Synopsys’ ARC EM processors.

An accelerated approach to achieving automotive safety with ASIL D

Addressing the challenge of achieving ASIL D certification of the functional safety of an SoC for use in the safety-critical path of an automotive system.
Expert Insight  |  Topics: Embedded - Architecture & Design, IP - Selection, EDA - Verification  |  Tags: , , , ,   |  Organizations:
March 3, 2017
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Reducing the power consumption of USB Type-C digital headsets

Thinner phones are going to need new connectors. Many designers are considering USB Type-C, and the related Audio Device Class 3.0 specification (ADC 3.0), for use in high-quality digital headsets.
Article  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , ,   |  Organizations: ,

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