Synopsys

April 10, 2013
Marco Casale-Rossi is a senior staff product marketing manager in the Design Group at Synopsys.

Time to take up the 3D integration challenge

It’s time to take up the challenge of applying 3D integration technology to IC design. The manufacturing process technology is maturing, the tool chains are in place, and the opportunities to broaden your market by applying a new form of systemic integration are growing.
Expert Insight  |  Topics: EDA - DFM, IC Implementation  |  Tags: , , ,   |  Organizations:
April 4, 2013
Michael Sanie, Synopsys

Debugging the debug challenge

Debug of logic and testbench debug makes up 35% of chip design, and is growing as power-management and hardware/software issues become part of the task.
February 12, 2013
Nithya Ruff, Director of Product Marketing for Virtual Prototyping Solutions at Synopsys.

Dev kits bring virtual prototyping to everyone

Now companies in any tier can use development kits as a platform to speed development, bridge the hardware-software divide and build out ecosystems quickly.
Expert Insight  |  Topics: Embedded - Architecture & Design  |  Tags: ,   |  Organizations:
February 12, 2013

How virtual prototyping enabled Altera’s SoC FPGAs

The technique drove ‘agile systems development’ for the programmable logic vendor’s new product line.
Article  |  Topics: Embedded - Architecture & Design, - Embedded Topics  |  Tags: , ,   |  Organizations: ,
February 5, 2013

Using VIP for cache coherency hardware implementations

Cache coherency implemented in hardware increases the verification effort. VIP-based strategies are described with particular reference to ARM protocols.
Article  |  Topics: EDA - Verification  |  Tags: , ,   |  Organizations: ,
January 24, 2013
Neill Mullinger, group marketing manager for VIP, Synopsys

Verification IP: the questions you should ask

How should you quiz your verification IP vendor to get the right VIP for your needs? Synopsys' Neill Mullinger details a checklist of the key points to raise.
Expert Insight  |  Topics: EDA - Verification  |  Tags: ,   |  Organizations:
December 12, 2012
Xilinx 3D-IC interposer featured image

Enabling 3D-IC design

Meeting the challenges of moving beyond planar integration to side by side, and eventually truly stacked, dice, for designers, tool vendors and the supply chain.
Article  |  Topics: EDA - IC Implementation  |  Tags: , , ,   |  Organizations: ,
December 6, 2012

20nm timing analysis – a practical and scalable approach

Using hierarchy and improved constraints management to accelerate static timing analysis at 20nm and below.
Article  |  Topics: EDA Topics, EDA - IC Implementation  |  Tags: , , , ,   |  Organizations:
November 16, 2012
Synopsys Virtualizer screen shot

The Shift Left: how virtual prototyping reduces risk

The business case behind how virtual prototyping speeds development, improves hardware and software quality, and improves ROI.
November 16, 2012
Marco Casale-Rossi

3DIC – the advantages and the challenges of vertical integration

The advantages and challenges of 3D IC integration, as we add vertical functional integration options to the traditional planar integration brought by the progress of Moore's Law.
Expert Insight  |  Topics: EDA - IC Implementation  |  Tags: , , ,   |  Organizations: , , ,

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