The argument for an integrated approach to SoC verification
Will Ethernet become the dominant interconnect for automotive applications? A look at the market trends and standards, and how to use Ethernet IP and virtual-prototyping solutions in automotive applications.
How to use PCIe in low-power SoCs by swapping the standard PCIe PHY for M-PCIe, defined by MIPI for mobile use
ProtoCompiler understands HAPS FPGA prototyping hardware, so it can optimize logic placement and partitioning, even on designs with up to 250m ASIC gates.
The configurability of processor IP such as Synopsys' ARC HS family gives designers the option to optimise for power, performance or a combination of both.
Using a physically aware flow to ensure that fixing one ECO doesn't introduce another during sign off.
An in-depth look at the role of FPGA-based prototyping and the validation use cases it offers when integrating complex blocks.
Catching x-propagation issues at RTL saves time and reduces uncertainty in gate-level verification
Advanced tools are being applied to established nodes to produce advanced designs for volume markets.
The fourth installment discusses the extra levels of debug capability available when using virtual prototypes through the example of an ARM big.LITTLE-based embedded system.
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