Mentor Graphics

February 11, 2016
David Wiens is Business Development Manager for the System Design Division at Mentor Graphics.

Where tools end and best practices begin

Learn how you can benchmark your design practices against the most successful players in the PCB market - and why you should.
January 27, 2016
Dr Lauro Rizzatti, verification consultant

Hardware emulation answers Brooks’ Law

What can you add to a challenging project without pushing out deadlines and muddling communication?
January 22, 2016
Verification IP, Mentor Graphics, Jan 16, Featured Image

Easing the use of APIs for verification IP stimuli

How to leverage a simpler, standardized approach to describing generic and reusable stimulus sequences for verification IP.
Article  |  Topics: IP - Selection, EDA - Verification  |  Tags: ,   |  Organizations:
January 11, 2016
Dr Walden Rhines is Chairman and CEO of Mentor Graphics

2016 – A continuation of change

Dr Walden Rhines, Mentor Graphics chairman and CEO, looks forward to the trends that will shape 2016 in the semiconductor industry.
January 4, 2016
Dr Walden Rhines is Chairman and CEO of Mentor Graphics

2015 – The year in review

Dr Walden Rhines, chairman and CEO of Mentor Graphics, opens a two-part analysis by looking back at the dominant design and business trends in 2015.
Expert Insight  |  Topics: EDA Topics  |  Tags: , , , , , ,   |  Organizations:
December 29, 2015
Stephen Pateras

Memory BIST for automotive designs

Behind the drivers for memory BIST innovation in areas such as power-on self-test, destructive and non-destructive techniques, and faster memory repair.
Expert Insight  |  Topics: EDA - DFT  |  Tags: , , , , ,   |  Organizations:
December 9, 2015
Emulation IoT Networking Challenges

Emulation overcomes the five main IoT and networking verification challenges

More protocols, multibillion-gate designs, minimized power, burgeoning software and, for networking, hundreds of switch and router ports emphasize the need for scalable, virtualized emulation.
November 2, 2015
Verification IP for greater productivity

How to cut verification time with VIP

This article shows practical ways to use verification IP for greater productivity with specific code examples from Mentor Graphics' Questa platform.
Article  |  Topics: EDA - Verification  |  Tags: , , , ,   |  Organizations: ,
September 18, 2015
Featured image: PHY VIP Sep 15

How PHY verification kits overcome traditional VIP limitations

Established physical layer verification IP packages focus so much on protocols they miss problems that arise from the broader context. A PHY verification kit bridges the gap.
Article  |  Topics: IP - Assembly & Integration, EDA - Verification  |  Tags: , , , , , , ,   |  Organizations:
August 24, 2015
Warren Kurisu is the Director of Product Management in the Mentor Graphics Embedded Systems Division, overseeing the embedded runtime platform business for the Nucleus RTOS, Mentor Embedded Linux, virtualization and multicore technologies, and graphics and development tools. Warren has spent nearly 30 years in the embedded industry, both as an embedded developer and as a business executive.

A scalable RTOS and other essentials for embedded wearables development

The wearables market is booming. Successful development depends on assembling the right software and hardware tools. Here's a primer on what to look for.

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