The USB Type-C connector is versatile and already gaining traction in laptops, tablets and desktops. Here's how verification IP plays an important role in achieving the best implementation.
How a new software-led flow speeds silicon bring-up within the Tessent environment, including a Cypress Semiconductor case study.
Reliability is growing to match security as a key challenge for PCB design. These tools and techniques will help you rise to it.
The open NVMe standard is helping non-volatile memory storage reach its true potential with increasingly rich verification support
Traditional techniques are being challenged by shortening design cycles and the effects of later process nodes.
We talk to Mentor's David Wiens about how the company is giving the board-to-factory design flow a needed upgrade.
How to tune your scan pattern creation and application to cost-effectively match your test objectives.
How virtualization and integration with hardware testers are enabling networking SoCs in the billion-gate era.
Mentor's chairman and CEO has dug into why chip sales forecasts often miss the target and suggests some tools for assessing the Internet of Things.
Multi-patterning, finFETs and more are forcing more detailed overhauls of P&R software at each process node. We dig into some of the key new issues and how they are being addressed.
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