Mentor Graphics

May 15, 2017
Dr Walden Rhines is Chairman and CEO of Mentor - A Siemens Business

The Wally Rhines interview – Part Two: AI, automotive and security

This second part looks at Mentor's views on flow neutrality, how DRS360 was born, machine learning and the threat from embedded Trojans.
May 10, 2017
Nest Thermostat for IoT PCB article

The basic PCB rules for a successful IoT design

Seven core considerations will help you realize your PCB for the Internet of Things more effectively.
May 8, 2017
Dr Walden Rhines is Chairman and CEO of Mentor - A Siemens Business

The Wally Rhines interview – Part One: Mentor as a Siemens business

Our extended fireside chat with Mentor Chairman and CEO Wally Rhines begins by canvassing his thoughts now the Siemens deal is done.
April 10, 2017
Ron Press is a technical marketing director at Mentor - A Siemens Business. He specializes in DFT and BIST and was the 2010 General Chair of the International Test Conference.

Drawing on hierarchical DFT to benefit all designs and flows

Hierarchical DFT is vital for large, complex designs. Users still to transition to the technique can nevertheless exploit its pattern reuse strategies as they move toward adoption.
Expert Insight  |  Topics: EDA - DFT  |  Tags: , , ,   |  Organizations: ,
March 15, 2017
DVCon China takes place at the Parkyard Hotel, Shanghai on April 19th.

DVCon China launches this April in Shanghai

DVCon China general chair Andy Liu discusses Accellera’s new addition to its design and verification conference series (简体中文).
Expert Insight  |  Topics: EDA - ESL, IC Implementation, Verification  |  Tags: , , , , , , ,   |  Organizations: , , ,
March 15, 2017
DVCon China takes place at the Parkyard Hotel, Shanghai on April 19th.

DVCon中国将于4月在上海亮相

DVCon中国大会主席刘红亮讨论了Accellera新增的DVCon中国ASIC设计和验证会议的看点。
Article  |  Topics: Uncategorized  |  Tags: , , , , , , ,   |  Organizations: , , ,
February 23, 2017
Cache verification involves checking multiple scenarios

Cache-coherency checks call on portable stimulus

Portable stimulus and formal verification provide the means to handle the challenge of verifying cache-coherent SoC interconnects.
February 8, 2017
Veloce featured image for SSD Verification article

Emulation strategies for SSD verification

SSD controllers are becoming increasingly complex and as a result emulation is now the first choice for SSD verification. But your strategy must still meet five key criteria.
January 27, 2017
Richard Pugh featured image SSD expert insight

The SSD memory revolution

Richard Pugh looks at how innovations highlighted during the recent International Memory Workshop are driving the solid state drive (SSD) market.
January 19, 2017
USB Type-C VIP featured image

USB Type-C: Verification challenges and solutions

The USB Type-C connector is versatile and already gaining traction in laptops, tablets and desktops. Here's how verification IP plays an important role in achieving the best implementation.
Article  |  Topics: IP - Assembly & Integration, EDA - Verification  |  Tags: , ,   |  Organizations:

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