Mentor Graphics

August 24, 2015
Warren Kurisu is the Director of Product Management in the Mentor Graphics Embedded Systems Division, overseeing the embedded runtime platform business for the Nucleus RTOS, Mentor Embedded Linux, virtualization and multicore technologies, and graphics and development tools. Warren has spent nearly 30 years in the embedded industry, both as an embedded developer and as a business executive.

A scalable RTOS and other essentials for embedded wearables development

The wearables market is booming. Successful development depends on assembling the right software and hardware tools. Here's a primer on what to look for.
June 30, 2015
Mark Handover is an applications engineer with Mentor Graphics

Back to basics – doing formal the right way

Considering design style, assertions, engines and coverage can help ease the development of an effective formal verification test plan
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , ,   |  Organizations:
May 29, 2015
Mentor Graphics/Wilson Research Group Functional Verification Study

Smaller designs face greater risk of respins

Research study suggests the maturity of your verification flow determines the likelihood of first-pass success far more than the complexity inherent in design size.
May 28, 2015
Featured image PCB Design for the mid-market

PCB tool innovation from the middle out

Mid-market users are driving richer features and cost competition into PCB design software like never before, largely thanks to the Internet of Things.
May 22, 2015
Eight steps for efficient PCB manufacturing and assembly - Part Two

Eight steps for efficient PCB manufacturing and assembly – Part Two

Second in a two-part series, describing critical rules that should underpin PCB manufacturing, and how new technologies overcome increasing complexity.
May 18, 2015
SMT p&p machine featured image - 8 rules for PCB manufacturing

Eight steps for efficient PCB manufacturing and assembly – Part One

First in a two-part series, describing critical rules that should underpin PCB manufacturing, and how new technologies overcome increasing complexity.
April 30, 2015
Dr Lauro Rizzatti is an independent verification consultant. You can contact him at lauro AT rizzatti DOT com

Putting emulation on the map

Emulation is now served by all three leading vendors and is a hot topic for discussion among engineers. The major verification conferences need to follow suit.
Expert Insight  |  Topics: EDA - ESL, IC Implementation, Verification  |  Tags: , ,   |  Organizations: , ,
March 26, 2015
10nm lithography progress

A review of model development for 10nm lithography

John Sturtevant looks at ongoing preparations for the incoming node and charts significant progress that has already been made.
Article  |  Topics: EDA - DFM  |  Tags: , ,   |  Organizations: , ,
January 26, 2015
Silicon Photonics litho featured image

How lithography simulations enable silicon photonics

Precise curved geometries are vital to making this emerging and cost-effective CMOS-based technology work. This primer explains its advantages and how litho tools are evolving to meet the challenges it presents.
January 20, 2015
Veloce2 emulator

Assertion-based emulation

Combining assertion-based verification techniques with emulation makes for easier debug, better coverage and greater functional efficiency.

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