Chipmaker

April 9, 2018
VR headset

Keeping up with the bandwidth demands of embedded displays

Increasing resolutions and rising frame rates are making it more challenging than ever to drive embedded displays effectively.
Article  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , , , ,   |  Organizations: , ,
March 19, 2018
Dr Lauro Rizzatti, verification consultant

How hardware emulation helps drones take flight

In an exclusive interview, Lauro Rizzatti discusses the increasing verification challenges for drone SoCs with Bo Shen, founder of fabless specialist Artosyn.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , , , ,   |  Organizations: ,
March 1, 2018
VR headset

Driving 4K smartphone and AR/VR device displays

How to combine a display processing unit from one company and a MIPI Display Serial Interface solution from another to build 4K embedded displays for smartphones and AR/VR devices.
Article  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , , , ,   |  Organizations: , , ,
January 9, 2018
HBM article featimg

Choosing between DDR4 and HBM in memory-intensive applications

Exploring the tradeoffs between implementing DDR4 and HBM for high-bandwidth memory subsystems.
Article  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , ,   |  Organizations: , , ,
November 24, 2017
John Ferguson is the Director of Marketing for Calibre DRC Applications at Mentor, a Siemens Business, in Wilsonville, Oregon, with extensive experience in physical design verification. He holds a BS degree in Physics from McGill University, an MS in Applied Physics from the University of Massachusetts, and a PhD in Electrical Engineering from the Oregon Graduate Institute of Science and Technology.

Assessing the true cost of node transitions

John Ferguson reviews the key capital metrics you need to review when deciding whether to move to a new process.
October 30, 2017
Debug case study for ARM/AXI based design

Case study: Verifying and optimizing software for power on SoCs

How emulation was used to debug out-of-spec power on a multicore ARM design using the AXI bus.
September 21, 2017
Diagnosis-driven yield analysis featured image

Yield is money – and other truths of diagnosis-driven yield analysis

Diagnosis-driven yield analysis identifies the cause of systematic yield loss to speed the ramp-to-volume on new processes and improve yield on mature ones.
September 14, 2017
Featured image - Silicon photonics

Silicon photonics moves out of the shadows

An alphabet soup of AI, HPC, 5G and the IoT has finally seeded creation of a design infrastructure for silicon photonics.
September 8, 2017
Ultra D HLS featured image

How HLS is giving shape to glasses-free 3DTV

High level synthesis (HLS) was adopted to realize innovative display IP as developed by a small core engineering team.
May 22, 2017
Ashish Darbari is CEO of formal verification consultancy Axiomise.

Introducing Doc Formal: the journey so far

Our new columnist introduces himself and traces the progress of formal verification over the last two decades. Join the discussion.

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