How emulation was used to debug out-of-spec power on a multicore ARM design using the AXI bus.
Our new columnist introduces himself and traces the progress of formal verification over the last two decades. Join the discussion.
This article shows practical ways to use verification IP for greater productivity with specific code examples from Mentor Graphics' Questa platform.
In sessions at the 2015 Design Automation Conference, engineers who had worked on finFET-oriented projects revealed how the technology has changed their design practices and where others may want to think twice about making the move.
ARM has revealed a number of details of the microarchitecture that underpins its flagship Cortex-A72 as the processor moves towards its production release.
Using equivalence checking to validate ECOs in ARM core subsystem development at STMicroelectronics
We are moving towards a "continuum of compute", ARM CEO Simon Segars said at CDNLive Silicon Valley, a trend that will reshape design.
This 'how to' guide shows how to combine the power of emerging and existing technologies for faster, more comprehensive test.
Soft blocking to prevent cell spreading and other placement-optimization techniques helped improve power and clock speed on a Cortex-M7 test chip designed by ARM and Cadence.
ARM and TSMC used an extensive pre-planning process, including a static analysis of each module's overall logic structure, to put together a 2.3GHz processor design based around ARM's main 64bit Big.Little pairing for the foundry's 16nm finFET process.
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