Altera

June 25, 2015
Agile diag 2 featimg

Applying agile techniques to IC design

How agile methodologies can be applied to personal and team practice in IC design, including for developing cloud accelerators at Microsoft
July 25, 2014
Steven Cline is a senior design automation Manager at Altera’s Austin Technology Center, focusing on design-flow automation for traditionally placed and routed blocks and custom FPGA IP used on Altera’s advanced FPGA products.

Using standardized design flows to cut time to tape-out – and speed design-flow evolution

Altera uses standardized design flows to help integrate Intel foundry rules, cut time to tape-out - and speed the evolution of its design flows.
Expert Insight  |  Topics: IP - Design Management, EDA - IC Implementation  |  Tags: , , , ,   |  Organizations: , ,
June 10, 2014
High-speed I/O eye diagram - thumbnail

Zeroing in on the problems of fast board-level interconnect

A panel session at DAC 2014 focused on the problems of high-speed, board-level interconnect and the roles of codesign and power integrity in solving them.
February 12, 2013
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How virtual prototyping enabled Altera’s SoC FPGAs

The technique drove ‘agile systems development’ for the programmable logic vendor’s new product line.
Article  |  Topics: Embedded - Architecture & Design, - Embedded Topics  |  Tags: , ,   |  Organizations: ,

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