An introduction to how virtual emulation has fueled the application of co-modeling for complex design verification.
This introduction to the new Accellera standard includes a demo of portable stimulus in use to fully verify a DMA engine.
DVCon China general chair Andy Liu discusses Accellera’s new addition to its design and verification conference series (简体中文).
System-level power is the next frontier for a power-intent standard – or rather a collection of them – being developed by a partnership between Accellera, Si2 and the IEEE.
How agile methodologies can be applied to personal and team practice in IC design, including for developing cloud accelerators at Microsoft
A reference simulator for the latest version of SystemC is now available for public review and comment, writes Accellera's Dennis Brophy. Here's what’s new in the proof-of-concept simulator, and how you can participate to refine the Accellera Systems Initiative’s work for standardization.
Long before the first portable computer batteries exploded, and even before anyone had the first visions of building massive data centers in the cold northwestern states of Oregon,Washington and Alaska, power consumption by electronic devices was a tough problem for chip designers. The difference now is that we are trying to manage power in ever-smaller […]