Synopsys

July 11, 2023

AI’s possible roles in verification covered at VF2023

The recent Verification Futures Europe conference looked at what AI, from decision trees to foundation models, could do to speed up RTL checks.
February 28, 2023

Imperas and Synopsys team on RISC-V debug

Imperas is integrating its ImperasDV verification IP with the VCS simulator and Verdi debug tools.
Article  |  Topics: Blog - EDA, IP  |  Tags: , ,   |  Organizations: ,
November 14, 2022

Semiwise brings cryogenic models to SOI

Semiwise has developed transistor models for the GlobalFoundries 22FDX that cover operation at cryogenic temperatures.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: ,
May 24, 2022

Saber models aim for ADI power chips

Synopsys and Analog Devices have agreed to provide model libraries for the chipmaker's DC/DC ICs and power regulators that work with the Saber simulation tool.
Article  |  Topics: Blog - IP  |  Tags: , ,   |  Organizations: ,
March 2, 2022

Synopsys talks AI in verification at DVCon

Synopsys R&D vice president Manish Pandey described the ways in which the tools supplier has harnessed machine learning so far to gain speedups and improvements in coverage.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
November 5, 2021

UK consortium starts work on cryogenic CMOS

A £6.5m grant will fund the development of memories and other IP to improve the control of qubits in quantum computers.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: , ,
November 3, 2021

Python provides the link for speed checks at Sondrel

Sondrel has combined EDA tools with custom SystemC and Python code to develop a system that can help automate the detailed performance analysis of high-level architectures before RTL is generated.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations: ,
September 18, 2019

Synopsys claims 35TOPS performance from new family of embedded vision cores

IP core focuses on avodiing memory access bottlenecks during processing of complex machine-learning and artificial-intelligence algortihms.
Article  |  Topics: Blog - IP, - Product  |  Tags: , , ,   |  Organizations:
July 5, 2019
ES Design West logo

The road to ES Design West: Design Pavilion

ES Design West aims to help integrate the supply chain but also has plenty of engineering content aimed at low power, security, embedded and more.
June 13, 2019

IoT ecosystems should shift to cellular connectivity for security – report

IoT ecosystems should shift from WiFi to cellular connectivity to make them easier to secure and manage.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , , , ,   |  Organizations: ,

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