Synopsys

March 24, 2017

The return of the CEO Outlook

The ESD Alliance is relaunching the annual panel session featuring CEOs from ARM, Cadence Design Systems, Mentor Graphics and Synopsys in Mountain View on April 9.
February 15, 2017

DVCon US 2017 preview: Mentor Graphics

The major verification conference is looming and Mentor's participation will include tutorials that explore the latest in portable stimulus, SystemC, VIP and more.
February 1, 2017

Five steps to faster FPGA implementation

Five steps you can take to speed up the FPGA implementation of a complex design, from structuring your design flow to debugging its output.
Article  |  Topics: Design to Silicon  |  Tags: , ,   |  Organizations:
January 10, 2017

Virtual prototyping case study focuses on address mapping, clocking and QoS in DDR memory interface optimisation

Case study applies virtual prototyping to optimise address mapping, clock frequency, and Quality of Service configurations to meet DDR performance goals.
Article  |  Topics: ESL/SystemC, Product  |  Tags: , ,   |  Organizations:
December 22, 2016

Webinar discusses SoC security, area, and power trade-offs

SoC security strategies, costs and trade-offs are analysed in this detailed webinar.
Article  |  Topics: Blog - IP  |  Tags: , ,   |  Organizations:
December 19, 2016

White paper discusses optimising the efficiency of DDR memory subsystems

DDR memory subsystems need careful optimisation as demands on memory grow more rapidly than off-chip bandwidth.
Article  |  Topics: Design to Silicon, Blog - IP  |  Tags: , ,   |  Organizations:
November 15, 2016

Siemens agrees deal to buy Mentor Graphics

German industrial conglomerate to pay $4.5B to extend its PLM division into electronic chip and systems design.
October 10, 2016

Speeding up AMS design in the age of finFETs

STMicroelectronics, Samsung, GSI Technology and Synopsys talk about the challenges of doing AMS design on finFET processes.
Article  |  Topics: Conferences, Design to Silicon  |  Tags: , , ,   |  Organizations: ,
September 14, 2016

Event: How ISO 26262 is driving automotive DFT requirements

Webinar explores the impact of ISO 26262 on DFT requirements, and what is being learnt from the introduction of the standard at ON Semiconductor.
September 12, 2016

Synopsys adds ultra-low power security processor IP

Ultra-low power security processor IP includes defences against side-channel attacks, data and instruction encryption, DSP options for sensor processing and more.
Article  |  Topics: Blog - IP, - Product  |  Tags: , , ,   |  Organizations:

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