FD-SOI is gradually building up a presence as a technology not just for low-power but RF and power integration.
Early-access customers talked about their experiences with the Synopsys Fusion-based flow in a panel session at the DAC.
Machine learning is gradually moving into implementation and verification tools for EDA.
What does it take to build data converter IP that will meet the reliability and functional safety requirements of the automotive industry?
DAC 2018 will see Synopsys focusing on close links with foundry partners, as well as exploring ways to exploit the potential of machine learning, in both SoC architectures and SoC design flows.
Synopsys applies AI to speed PrimeTIme, as part of wider strategy to exploit machine learning to ease chip design
Arm is on the way to making formal a fundamental part of its verification strategy for ARM Cortex-A processors.
Synopsys has extended its range of semiconductor IP for use in advanced driver assistance (ADAS) and autonomous vehicle SoCs with the launch of embedded vision processor blocks that have been given safety enhancements.
New flow enables high-performance, high-integration designs.
Free e-book offers an introduction to formal verification methods for those who may be curious about the technique, or who need to understand its advantages and limitations in order to manage its use effectively.
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