July 2, 2019
The verification IP is the first to become commercially available for the bus interface backed by companies such as AMD, Google, IBM, Micron and Xilinx.
June 13, 2019
AI, its system design implications and its impact on EDA tools themselves will be a key theme for ES Design West next month.
June 4, 2019
Developing a security assurance standard for IP faces numerous problems but Accellera working-group members are trying to find an answer.
May 28, 2019
Heart of Technology (HoT) founder and Jim Hogan talks about the event at the upcoming ESDesign West show in San Francisco.
May 13, 2019
Security and machine learning are two topics that take center stage at DAC this year, says the conference’s general chair Rob Aitken.
May 3, 2019
EDA and IP supporters of the new event see the goal of greater integration with the electronic systems supply chain as fundamental to their involvement.
April 24, 2019
Accellera is trying to standardize extensions to UVM for mixed-signal design.
April 4, 2019
An Open Compute Project group working on multichip integration sees a combination of parallel and serial interfaces being important for interchip communication.
March 26, 2019
DVCon Europe has added embedded software, digital twin, machine learning, and RISC-V to the topics the conference organizers want to cover.
March 20, 2019
Not only has Microsoft decided to make a compression algorithm intended for data centers open source, the company the company is providing its own RTL to anyone who wants to implement it in silicon.