July 14, 2021
Accellera has approved version 1.0 of the SA-EDI standard, intended to provide a consistent way of describing security concerns for IP cores.
June 17, 2021
A de facto standard for exchanging thermal information about designs has become JEDEC standard JEP181.
April 15, 2021
The Accellera board has approved version 2.0 of the Portable Test and Stimulus Standard.
April 7, 2021
Accellera has published the version 1.0 draft of the proposed Security Annotation for Electronic Design Integration standard.
February 10, 2021
SEMI event brings together players from the global microelectronics supply chain, manufacturing, and end-user communities.
November 27, 2020
Use of the open-source RISC-V processor was tracked for the first time by the biennial study, finding notably high take-up.
November 19, 2020
Accellera Systems Initiative has published for open review version 2.0 of the Portable Test and Stimulus standard.
July 23, 2020
The chair of Accellera’s IP security assurance working group expects the draft standard for hardening hardware core to be out by the end of the year.
May 26, 2020
DVCon US is to repeat sessions online from today until the middle of August, with exclusive access to registered attendees through early June.
March 3, 2020
DVCon US 2020 is to end a day early as a result of the COVID-19 coronavirus outbreak and released an updated agenda.