SmartDV


December 3, 2021

DAC 2021 preview: SmartDV

The design and verification IP specialist will present its full range, including the Smart Compiler, at next week's Design Automation Conference.
Article  |  Topics: Conferences, Digital/analog implementation, Blog - EDA, - RTL, Verification  |  Tags:   |  Organizations: ,
February 24, 2020

DVCon US 2020 preview: SmartDV

The latest in MIPI and DDR design and verification IP as well as protocol debug are highlights in SmartDV's DVCon program.
Article  |  Topics: Blog - IP, - Verification  |  Tags: , , , , , , ,   |  Organizations: ,
July 2, 2019

The road to ES Design West: Location, location, location

There's still plenty of time to build a busy and profitable agenda for a visit to ES Design West and SEMICON West in San Francisco next week.
July 2, 2019

SmartDV adds verification IP for OpenCAPI data-center standard

The verification IP is the first to become commercially available for the bus interface backed by companies such as AMD, Google, IBM, Micron and Xilinx.
June 20, 2019

The road to ES Design West: Systems

ES Design West was created to reflect integration, even elision of tasks across the semiconductor supply chain. Here's how the program reflects the trend.
April 2, 2019

DVCon China 2019 preview: SmartDV

RISC-V VIP offerings headline the verification specialist’s presence in Shanghai later this month.
Article  |  Topics: Blog - EDA, - Standards, Verification  |  Tags: , , , ,   |  Organizations: ,
February 19, 2019

DVCon USA 2019 preview: SmartDV

The verification IP specialist is focusing on its new products for RISC-V verification and for emulation platforms next week in San Jose.
Article  |  Topics: Conferences, Verification  |  Tags: , , ,   |  Organizations: ,

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