Mentor

February 13, 2018

HyperLynx update automates SerDes validation

Simulation suite automates the largely manual process of validating more than 25 SerDes protocols.
Article  |  Topics: Blog Topics, Blog - PCB, - Product  |  Tags: , , , , , ,   |  Organizations:
February 12, 2018

DVCon US 2018 preview: Mentor

The Siemens subsidiary is involved with a wide range of tutorials, technical papers and more at this month's San Jose conference.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , , ,   |  Organizations: , , ,
January 23, 2018

ARM DesignStart case study demonstrates scheme’s ease-of-use

ARM and Mentor describe a proof-of-concept project using free tools and IP to combine AMS and digital.
January 23, 2018

Triage without tears: improving debug’s most human challenge

Struggling with how to make your debug triage process more efficient? A new checklist could help focus your efforts.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , ,   |  Organizations:
January 2, 2018

The best in PCB design during 2017

Read some edited highlights from the most successful companies in Mentor's 2017 Technology Leadership Awards.
Article  |  Topics: General, Blog - PCB  |  Tags: , , , , , , , , ,   |  Organizations:
December 22, 2017

Toward the ISO26262 update: Still fighting an old war?

A new version of automotive safety standard ISO 26262 is due in 2018 but how close to Level 5 autonomy will it actually take us? And what about security?
Article  |  Topics: Commentary, Standards  |  Tags: , , , , , ,   |  Organizations: ,
December 7, 2017

Discover how ST adapted HLS for automotive imaging

ST has tweaked its standard HLS flow for ISPs to meet the requirements of ISO 26262
December 6, 2017

Learn how to simplify power states in UPF

UPF power state tables have become unwieldy due to rapid growth in LP design. The new construct, 'add_power_state' enables better verification flows.
Article  |  Topics: Blog - EDA, - Standards, Verification  |  Tags: , , ,   |  Organizations: , , ,
December 1, 2017

Workshop sees the RISC-V ecosystem expand

The RISC-V workshop in California at the end of November 2017 provided the opportunity for Western Digital to commit its own work on processors for internal use to the open-source architecture and for the ecosystem of off-the-shelf cores and tools to expand.
November 21, 2017

Siemens builds Mentor AMS offering with Solido buy

Solido acquisition will also add further machine learning expertise to Mentor's capabilities.
Article  |  Topics: Digital/analog implementation, Blog - EDA  |  Tags: , , , ,   |  Organizations: ,

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors