ST has tweaked its standard HLS flow for ISPs to meet the requirements of ISO 26262
UPF power state tables have become unwieldy due to rapid growth in LP design. The new construct, 'add_power_state' enables better verification flows.
The RISC-V workshop in California at the end of November 2017 provided the opportunity for Western Digital to commit its own work on processors for internal use to the open-source architecture and for the ecosystem of off-the-shelf cores and tools to expand.
Solido acquisition will also add further machine learning expertise to Mentor's capabilities.
Mentor will present seven papers during the ARMTech Con and a dedicated session, and exhibit at Booth #606.
Automotive test has never been easy. Safety made sure of that. But the move to autonomous vehicles is making it more challenging still.
An emulator that extends the reach of hardware acceleration into the world of multiphysics analysis could result from the merger of Siemens PLM Software with Mentor.
EDA's leading association will be visible across the program at DAC 2017 from CEO interviews to social events.
Mentor, a Siemens business, has released details on its varied activities at DAC 2017, ranging from panels to technical papers.
The vendor's experiences in enabling concurrent engineering in Xpedition Enterprise contain lessons for all design disciplines.
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