Closing code coverage from HLS has been tricky because the C++ tools were built for software not hardware. But that is changing.
With PSS moving toward greater adoption, the Siemens vendor seems PSS-DSL as a winner in terms of conciseness and ease-of-adoption.
Mentor's flagship PCB suite is aiming to offer another 'shift left' in verification as respins rise.
Qualcomm has described its use of Calibre RealTime Digital to enhance its P&R flow.
Mentor's updated AMS platform claims performance boost by obviating 'legacy' technology.
As ITC 2018 begins, Mentor addresses stringent ISO 26262 requirements and looks to bridge the gap in how IJTAG-based debug is structured.
The latest Mentor-commissioned Wilson Research Group study on ASIC and FPGA verification highlights technique adoption and maturity.
The LightSuite Compiler produces designs based on Python descriptions and certifies them DRC-clean through hooks into the market-leading Calibre DFM suite.
Tanner's focus on AMS, MEMS and, now, the IoT-edge are making it even more ripe for integration with other Mentor tools.
How are Siemens' internal investments in Mentor to fuel innovation and integration stacking up alongside the boost it has given for M&A?
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