Mentor Graphics

June 30, 2015

Chipmakers see 3x test-pattern saving in embedded-test logic

Companies such as Broadcom are experiencing threefold test-pattern reductions through the use of automatically inserted gates that allow parallel cones to share the same ATPG patterns that would not be possible using conventional test generation schemes.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations: ,
June 19, 2015

Tanner integration to assist Mentor in IoT and photonics

Following Mentor's acquisition of Tanner EDA, management expect the integration will help with a drive into IoT applications and systems that need to go beyond standard IC lithography.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , , , , ,   |  Organizations: ,
June 16, 2015

Collaboration let HiSilicon accelerate 16nm finFET plans

HiSilicon claims close collaboration with foundry and EDA tools partners helped speed up plans to tape out the first 16nm finFET-based design through TSMC.
June 8, 2015

CEA-Leti adds partners to FD-SOI low-power design centre

Silicon Impulse program adds partners to ease industrialisation of ultra-low power IC designs based on FD-SOI processes
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations: , ,
June 5, 2015

DAC 2015: Mentor Graphics at the Design Automation Conference

Review highlights from Mentor's activities at DAC and grab your last chance to register for in-depth technical sessions.
Article  |  Topics: Conferences, Blog - EDA, Embedded, IP, PCB  |  Tags:   |  Organizations:
May 27, 2015

Mentor zooms in on power peaks with emulator interface

Mentor Graphics has released a programming interface to its Veloce emulators intended to support faster and more accurate power estimation.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations: ,
May 11, 2015

Formal verification conference offers ARM, Broadcom, Imagination insights, online access

Conference addresses formal verification techniques at levels to suit beginners through to experts
May 5, 2015

Xilinx updates Vivado with CDC, faster verification, third-party flows, and lab edition

New version of Vivado adds verification features and speed, extends Zynq support
Article  |  Topics: Product  |  Tags: ,   |  Organizations: , , , ,
April 24, 2015

Do you need more stress (analysis) in your life?

Mentor Graphics is working on technology to analyse the effects of mechanical stress on integrated circuits, describing progress at the company's U2U conference.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , , , ,   |  Organizations:
April 22, 2015

Mentor tool streamlines multi-corner parasitic extraction

Mentor Graphics has launched Calibre xACT, a tool that uses deterministic algorithms to extract parasitics from complex finFET and other nanometer processes.

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