IEDM

April 7, 2016

SNUG 2016: Intel, TSMC, GloFo back post-finFET research at UC Berkeley

But project lead Chenming Hu, 'finFET's father', has also highlighted important changes in the funding landscape for university research.
December 7, 2015

Asymmetric variability issues could impact 7nm processes

Simulation shows 7nm process will need tighter variability control than expected, and possibly accommodation for asymmetric variability
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July 9, 2015

IBM and friends at 7nm: breakthrough or science project?

IBM, GlobalFoundries, Samsung and SUNY deserve kudos for manufacturing the first 7nm chip but the NREs involved still look frightening.
December 16, 2013

Qualcomm’s take on preserving Moore’s Law economics

Industry-wide innovation is required to make scaling cost-effective at 7nm, says Qualcomm's VP of Technology. Time for a fat, cholesterol and MSG-free diet.
December 10, 2013

Graphene gets a reality check

A leading researcher argues that graphene will not replace but complement silicon and thrive in specialist applications.
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October 1, 2013

TSMC 16nm finFET, Ge 20nm p-finFET set for IEDM

TSMC 16nm finFET process and efforts to increase p-finFET mobility using germanium to be detailed at December's International Electron Devices Meeting.
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May 5, 2013

IEDM2013 call for papers closing soon

It's time to act if you want your semiconductor device or process research to be considered for presentation at IEDM 2013 in Washington DC this December.
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December 11, 2012

FD-SOI vs finFETs mulled during IEDM

Can planar devices on fully depleted SOI resist the relentless rise of finFETs as the next device architecture of choice for the semiconductor industry? An evening panel at IEDM explored the trade-offs
December 11, 2012

Semiconductor roadmap gets fuzzier at IEDM

Semiconductor process options outlined at IEDM by Luc van den Hove of imec as industry faces hard choices and rising costs
December 10, 2012

Germanium finFETs, TFETs and MEMS modelled at IEDM

The modelling track at IEDM 2012 showed how germanium could be used in 14nm finFETs. Other work focused on tunnel FETs and analyzing MEMS using Spice.
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