But project lead Chenming Hu, 'finFET's father', has also highlighted important changes in the funding landscape for university research.
Simulation shows 7nm process will need tighter variability control than expected, and possibly accommodation for asymmetric variability
IBM, GlobalFoundries, Samsung and SUNY deserve kudos for manufacturing the first 7nm chip but the NREs involved still look frightening.
Industry-wide innovation is required to make scaling cost-effective at 7nm, says Qualcomm's VP of Technology. Time for a fat, cholesterol and MSG-free diet.
A leading researcher argues that graphene will not replace but complement silicon and thrive in specialist applications.
TSMC 16nm finFET process and efforts to increase p-finFET mobility using germanium to be detailed at December's International Electron Devices Meeting.
It's time to act if you want your semiconductor device or process research to be considered for presentation at IEDM 2013 in Washington DC this December.
Can planar devices on fully depleted SOI resist the relentless rise of finFETs as the next device architecture of choice for the semiconductor industry? An evening panel at IEDM explored the trade-offs
Semiconductor process options outlined at IEDM by Luc van den Hove of imec as industry faces hard choices and rising costs
The modelling track at IEDM 2012 showed how germanium could be used in 14nm finFETs. Other work focused on tunnel FETs and analyzing MEMS using Spice.
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