GlobalFoundries

September 21, 2017

GlobalFoundries adds 12nm finFET process

GlobalFoundries intends to offer a 12nm FinFET process as a stepping stone from its 14nm process.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations: ,
June 27, 2017

Sonics adds heat-aware DVFS to SoC power controller

Sonics has developed a version of its power-management IP core for SoCs that adds support for dynamic voltage and frequency scaling, along with the ability to tune settings according to temperature.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations: ,
June 1, 2017

DAC 2017 preview: Synopsys

Synopsys has released details on its varied activities at DAC 2017, ranging from panels to technical papers.
Article  |  Topics: Conferences  |  Tags:   |  Organizations: , , , , , ,
May 11, 2017

Racyics puts FD-SOI design flow online

Racyics has kicked off a hosted-design service to make it easier for startups and researchers to access the 22nm FD-SOI process offered by GlobalFoundries.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: , ,
February 13, 2017

SPIE Advanced Lithography preview: Mentor Graphics

The major West Coast technical conference for lithography is just two weeks away and offers a packed agenda.
December 12, 2016

IEDM explores faces of 3D monolithic integration

What will 3D integration look like? IEDM 2016 explored some of the options ranging from IoT sensors to advanced logic.
Article  |  Topics: Blog Topics  |  Tags: , , ,   |  Organizations:
October 24, 2016

Serdes deal to push copper server interconnect to 100Gbit/s

A licensing deal with GlobalFoundries has provided chipmaker Aquantia with the ability to speed up development of a 100Gbit/s link technology for data centers.
Article  |  Topics: Blog - EDA, IP  |  Tags: , ,   |  Organizations:
September 16, 2016

GlobalFoundries ports MRAM to 22nm FD-SOI

GlobalFoundries has introduced an embedded-MRAM option for its 22nm FD-SOI process: the 22FDX platform.
Article  |  Topics: Blog - IP  |  Tags: , , ,   |  Organizations:
June 20, 2016

Let’s lose the fins

DTCO work by GlobalFoundries and Qualcomm reported at VLSI Symposia shows the need to minimize fin counts in future finFET processes.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , , , ,   |  Organizations: ,
April 7, 2016

SNUG 2016: Intel, TSMC, GloFo back post-finFET research at UC Berkeley

But project lead Chenming Hu, 'finFET's father', has also highlighted important changes in the funding landscape for university research.

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