CEA-Leti

September 12, 2018

Mentor automates silicon photonics layout

The LightSuite Compiler produces designs based on Python descriptions and certifies them DRC-clean through hooks into the market-leading Calibre DFM suite.
August 3, 2018

MPW service arrives for RRAM

Research institute Leti and low-volume wafer service CMP are cooperating on a project to let fabless chipmakers explore the use of non-volatile resistive RAMs in their designs.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations:
July 11, 2018

Leti and Soitec partner for wafer development

Research institute Leti and Soitec have decided to team up to work on a new generation of engineered substrates, such as specialized SOI wafers.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
April 5, 2018

Leti releases photonics design kit for Synopsys PhoeniX OptoDesigner suite

PDK enables photonics prototyping on MPW runs and compatibility with volume production at STMicroelectronics at Crolles.
Article  |  Topics: Blog - EDA, IP, - Product  |  Tags: , ,   |  Organizations: , ,
December 6, 2017

European teams explore 3D integration tradeoffs

Two leading European research institutes presented their work on the feasibility and cost-effectiveness of monolithic 3D integration at this year's IEDM.
Article  |  Topics: Blog - EDA, IP  |  Tags: , ,   |  Organizations: ,
October 18, 2017

Sub-10nm finFETs to feature at IEDM

Intel and GlobalFoundries will talk about their post-14nm finFET-based processes at December's IEDM.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations: , , ,
December 15, 2015

GaN power makes progress at IEDM 2015

Researchers describe at IEDM 2015 how they are making gallium nitride fit into a wider range of power-handling applications and may even result in mass-market vertical transistors.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , ,   |  Organizations: ,
June 8, 2015

CEA-Leti adds partners to FD-SOI low-power design centre

Silicon Impulse program adds partners to ease industrialisation of ultra-low power IC designs based on FD-SOI processes
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations: , ,
March 12, 2015

Cea-Leti opens FD-SOI design center

CEA-Leti has launched a design center called Silicon Impulse with the intention of lowering the entry barrier to using the FD-SOI process.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
March 11, 2015

IoT and RF ‘to drive FD-SOI adoption’

The FD-SOI technology developed by CEA-Leti and STMicroelectronics is beginning to gain ground as chipmakers investigate the process as a way to deliver low-energy, wireless-capable SoCs.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , ,   |  Organizations: , ,

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