Cadence Design Systems

October 31, 2018

Cadence adds deep-learning support to audio DSP

Cadence has added direct support for neural networks to the latest iteration of its DSP cores aimed at audio systems.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , , ,   |  Organizations: ,
September 19, 2018

Cadence culls zeroes for faster neural throughput

Cadence has launched an AI processor using an designed to take advantage of the sparse structure of typical deep neural networks.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , ,   |  Organizations:
July 5, 2018

Cloud makes hardware acceleration more accessible

After the moves by Cadence and Mentor, emulation in the cloud may only be the start of providing verification acceleration as a service.
July 2, 2018

Tools suppliers back version 1.0 of portable-stimulus standard

Accellera has published the first release of the Portable Test and Stimulus Standard (PSS), with tools suppliers following up with software support.
June 26, 2018

EDA learns to love AI

Machine learning is gradually moving into implementation and verification tools for EDA.
June 25, 2018

Cadence puts tools in the cloud

Cadence Design Systems has made a collection of its tools suitable for cloud computing, providing them for both Cadence- and customer-managed environments.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations:
May 22, 2018

Arm Cortex-A processor team focuses on formal

Arm is on the way to making formal a fundamental part of its verification strategy for ARM Cortex-A processors.
May 9, 2018

Motion harvester wins MEMS design contest

Energy harvesting, mechanical reprogrammable logic, and genetic algorithms were among the finalists for the MEMS design competition.
May 8, 2018

Cadence opens three fronts on mixed-signal failures

Cadence has started the rollout of a set of design tools for mixed-signal reliability analysis.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
April 11, 2018

Tensilica DSP extends pipeline for performance

Cadence Design Systems’ Tensilica division has launched a variant of its Vision P6 processor core to tackle embedded designs that need to run a mixture of imaging and deep learning-type algorithms.
Article  |  Topics: Blog - IP  |  Tags: , , , ,   |  Organizations:

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