Cadence has launched an AI processor using an designed to take advantage of the sparse structure of typical deep neural networks.
Cadence Design Systems
After the moves by Cadence and Mentor, emulation in the cloud may only be the start of providing verification acceleration as a service.
Accellera has published the first release of the Portable Test and Stimulus Standard (PSS), with tools suppliers following up with software support.
Machine learning is gradually moving into implementation and verification tools for EDA.
Cadence Design Systems has made a collection of its tools suitable for cloud computing, providing them for both Cadence- and customer-managed environments.
Arm is on the way to making formal a fundamental part of its verification strategy for ARM Cortex-A processors.
Energy harvesting, mechanical reprogrammable logic, and genetic algorithms were among the finalists for the MEMS design competition.
Cadence has started the rollout of a set of design tools for mixed-signal reliability analysis.
Cadence Design Systems’ Tensilica division has launched a variant of its Vision P6 processor core to tackle embedded designs that need to run a mixture of imaging and deep learning-type algorithms.
Cadence Design Systems has made enhancements to its Virtuoso mixed-signal layout tool at both the system-level and nanometer-design levels for its 18.1 release.
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