UCIS


March 1, 2016

Mentor builds out verification IP for memory

About 1,600 new UVM System Verilog verification IP memory models will cut testbench development time and offer more time to increase coverage.
June 6, 2012

DAC 2012: A look inside Accellera’s UCIS

Accellera has approved version 1.0 of the Unified Coverage Interoperability Standard (UCIS). Here's how it works.
May 29, 2012

DAC 2012: Accellera takes first step to a real coverage standard

UCIS 1.0 will provide a common format to analyze and compare data from different vendors' tools. Yup, it's a 'Biden' of a deal.
Article  |  Topics: Blog Topics, Conferences, Blog - EDA, - Standards, Verification  |  Tags: , , ,   |  Organizations:

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors