test

March 22, 2016

Spectrum analyzers aim for IoT projects

Tektronix has aimed a pair of RF instruments at the growing number of engineering teams trying to incorporate low-power wireless communications into their designs.
Article  |  Topics: Blog - Embedded, PCB  |  Tags: , , ,   |  Organizations:
March 15, 2016

Tek brings chips to the tips for high-bandwidth probing

Tektronix has moved the some of the active signal-conditioning to the tip to develop a probe for oscilloscopes that can handle bandwidths up to 20GHz and with less need for de-embedding techniques.
Article  |  Topics: Blog - PCB  |  Tags: , , , ,   |  Organizations:
February 25, 2016

Mentor’s Veloce boasts emulation gains fueled by software

Mentor Graphics is looking to get yet more efficiency from its market-leading Veloce emulator family through an OS upgrade and new task-specific Apps.
December 18, 2015

Accellera and Mentor’s Dennis Brophy talks standards targets and DVCon

Driving down energy consumption for the IoT, making portable stimulus deliver real benefits and the practical benefts of a globalizing DVCon.
December 4, 2015

Three key ways to reduce silicon test costs

Mentor's Greg Aldrich describes how test's market leader is driving down cost in the billion-gate era by rethinking and extending existing technologies
October 6, 2015

Samsung taps Mentor tools for higher yielding close-loop DFM

Samsung bases PRISM and FLARE defect analysis and optimization on Mentor Graphics' Calibre and Tessent. Yields rise. Ramps shorten.
June 30, 2015

Chipmakers see 3x test-pattern saving in embedded-test logic

Companies such as Broadcom are experiencing threefold test-pattern reductions through the use of automatically inserted gates that allow parallel cones to share the same ATPG patterns that would not be possible using conventional test generation schemes.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations: ,
November 11, 2014

Space camera project uses rapid development for test

UK-based RAL Space has picked up an award from National Instruments for a system the organization built to test a pair of cameras ahead of being being deployed on the International Space Station to photograph the Earth from orbit.
Article  |  Topics: Blog - Embedded, PCB  |  Tags: , ,   |  Organizations:
August 7, 2014

NI aims to bring design and production closer with chip-test plan

National Instruments plans to build an ecosystem around semiconductor test that could provide a missing link between the design process and production.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations: ,
November 5, 2013

Formal app looks for sneak paths in secure chips

Jasper Design Automation has developed a tool that analyzes RTL and gate-level HDL for hidden paths that may expose on-chip secure elements to hackers.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:

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