steep-subthreshold devices


October 22, 2018

IEDM to examine scaling from multiple directions

CMOS moving to 3nm and DRAM going beyond 20nm scaling are two of the late papers at the upcoming IEDM and part of a larger examination of semiconductor trends.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: , ,
June 13, 2012

Low-power logic for steampunks

MEMS relay-based devices offer the ultimate in subthreshold leakage: they don't have any. Design and technology advances are promising to overcome problems with reliability, design and speed, according to Tsu-Jae King Liu of UC Berkeley.

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