SPICE

January 21, 2024

Take a deeper dive into BCI-ROM

A new paper looks at examples for using The Boundary Condition Independent Reduced Order Model (BCI-ROM) in its VHDL-AMS implementation for electro-thermal analysis.
Article  |  Topics: Digital/analog implementation, Standards, Verification  |  Tags: , , , ,   |  Organizations:
November 30, 2023

Benchmarking the maturity of AI in EDA

Solido discusses how it has leveraged AI for SPICE level efficiency and the benchmarks it has used.
July 12, 2022

Siemens compiles analog into simulation for faster debug

Siemens EDA has launched a second version of its Symphony simulation environment designed to support quicker debug cycles.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations:
October 27, 2020

ROHM eases component choice by offering cloud simulation and collaboration environment

A Japanese component supplier is making it easier for its customers to choose the right parts for their designs by offering a powerful analog and mixed-signal (AMS) simulation environment through its website.
July 20, 2020

FastSPICE upgrade boosts nano-scale analog verification by up to 10X

Mentor adds Analog FastSPICE eXTreme innovations for designs facing increasing parasitic complexity and contact resistance challenges at cutting edge nodes.
June 6, 2016

Intento uses graphs to optimize analog blocks

Startup launches an analog-circuit migration and optimization tool that uses less simulation time than traditional approaches the company claims.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
April 7, 2016

SNUG 2016: Intel, TSMC, GloFo back post-finFET research at UC Berkeley

But project lead Chenming Hu, 'finFET's father', has also highlighted important changes in the funding landscape for university research.
July 15, 2015

PSpice builds interfaces to PCB and system-level cosimulation

The need for virtual prototyping at the PCB-design has led to changes in the way PSpice is being used – with much greater emphasis on cosimulation.
Article  |  Topics: Blog - PCB  |  Tags: , , ,   |  Organizations:
June 29, 2015

FastSpice update improves parallelism and adds wreal support

The latest update to the CustomSim FastSpice tool from Synopsys provides more consistent speedups from multicore workstations and adds support for BCD processes and real-number modeling.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations:
June 7, 2015

DAC 2015 forecast: Cloudy with a chance of Spice installs

Spice regressions, library characterisation and yield analysis are all being promoted as suitable for running on the cloud
Article  |  Topics: Verification  |  Tags: , , , ,   |  Organizations: ,

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