signal promotion

July 30, 2015

10nm flow reveals complexity of finFET design process

Collaboration between ARM, TSMC and Synopsys reveals challenges of 10nm finFET design flows.

Article | Topics: Conferences, Design to Silicon, Blog - EDA | Tags: 10nm, 16nm, DPT, finFET, pin access, routability, signal promotion | Organizations: Arm, Synopsys, TSMC

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