RISC-V

May 1, 2018

Andes teams with Imperas and UltrasoC for RISC-V

Andes Technology has expanded support for its RISC-V processor cores through deals with Imperas and UltraSoC.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: , ,
April 9, 2018

DAC keynotes and sessions aim for AI

DAC in June will feature a series of keynotes and technical sessions on machine learning and AI for both target applications and in the design process itself.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , ,   |  Organizations: , , ,
January 28, 2018

UltraSoC delivers trace for RISC-V

UltraSoC has released its first implementation of processor trace for cores based on the RISC-V instruction set.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , ,   |  Organizations:
January 23, 2018

Codasip updates processor-architecture tools

Codasip has launched the seventh generation of its Studio software for processor design and tuning, aiming to take advantage of the interest in RISC-V as a core instruction set for customized processors.
Article  |  Topics: Blog - EDA, Embedded, IP  |  Tags: , ,   |  Organizations:
December 1, 2017

Workshop sees the RISC-V ecosystem expand

The RISC-V workshop in California at the end of November 2017 provided the opportunity for Western Digital to commit its own work on processors for internal use to the open-source architecture and for the ecosystem of off-the-shelf cores and tools to expand.
October 19, 2017

Microsemi sets up RISC-V partner program

Microsemi has set up an ecosystem program around the RISC-V soft cores the company has designed for its FPGAs.
Article  |  Topics: Blog - EDA, Embedded, IP  |  Tags: , ,   |  Organizations: ,
August 21, 2017

Codasip adds IoT core to RISC-V line

Codasip has added a processor core aimed at low-energy IoT nodes to its growing portfolio of customizable designs based on the RISC-V architecture.
Article  |  Topics: Blog - IP  |  Tags: , ,   |  Organizations:
June 19, 2017

UltraSoc donates trace format to RISC-V group

UltraSoc has donated to the RISC-V Foundation a specification for processor trace to try to provide the ecosystem with a common way of exporting runtime data to software tools.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , , ,   |  Organizations: ,
June 15, 2017

Microsemi builds Windows IDE for RISC-V

Semiconductor supplier Microsemi has used the Eclipse open-source IDE platform to develop a Windows-based toolchain for CPUs that supports the RISC-V instruction set.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , ,   |  Organizations:
March 13, 2017

Open-Silicon claims RISC-V ultra-low-power first

Implementation uses dedicated PULP technology in silicon for Green Waves Technologies on TSMC's 55nm LP process.

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors