August 3, 2018
Research institute Leti and low-volume wafer service CMP are cooperating on a project to let fabless chipmakers explore the use of non-volatile resistive RAMs in their designs.
June 21, 2018
Panasonic and AIST have turned a resistive memory (RRAM) into a hydrogen sensor that they claim works at much lower energy than existing designs.
May 12, 2017
Among the papers at this year's VLSI Symposia in Hawaii in June, Samsung will describe a 7nm CMOS process that uses EUV lithography to tighten up device features on minimum-pitch interconnects.
September 30, 2015
A novel approach to 3D NAND will be among the presentations at the International Electron Device Meeting to be held in Washington, DC in December.
March 11, 2015
As plans crystallize to take FD-SOI down to 10nm, CEA-Leti argues that the technology can provide an alternative path to that of finFETs to get to 7nm processes and beyond.