Does 2.5DIC call for IC design tools for the packaging?
Siemens has published a white paper that examines whether package designers need to adopt IC tools and design styles in the move from organic packages to 2.5DIC packages.
multi-die package
Intel talks 4 at VLSI
Intel expects to double logic density through metal scaling and smaller cells with upcoming process.
Nvidia open to chiplet standards
Nvidia says it will support the UCIe chiplet interface standard once it has "stabilized" while opening up its latest form of NVLink to other companies.
PCI may provide key to OCP chiplet standard
The ODSA Workgroup formed by Netronome and others is looking to adopt the PIPE standard for interconnecting chiplets as it starts work on a proof-of-concept module.
Mentor builds links for multichip package integration
Mentor, a Siemens business, has formed an alliance with foundries and OSAT providers and launched a flow that brings IC and package design together.
User2User preview: Silicon Valley edition rolls out this month
Companies presenting at User2User Santa Clara on April 26 include AMD, Microsoft, nVidia, Oracle, Qualcomm, and Samsung.
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