Three Mentor divisions - Embedded, PADS and Tanner EDA - will present their latest innovations during the conference and exhibition in Nuremberg next week.
Analog fault simulation times have barely fallen for two decades but that is beginning to change.
What's old is new: 200mm wafers are returning and driving shortages while 450mm fades into the distance.
On-demand seminar explains how to exploit recently announced integration of Tanner and Eldo suites for sensor, IoT and other design types.
Silicon Labs is aiming at Internet of Things applications with an ARM Cortex M0+-based MCU family with encryption engine and low-energy DAC for biasing analog circuitry.
For the new web TV program Unhinged, Brian Fuller talked to venture capitalist Jim Hogan about the future of mixed-signal and the past of EDA.
Accellera Systems Initiative has published the language reference manual for the latest version of its mixed-signal simulation environment based on SystemC. Version 2.0 of SystemC-AMS adds support for more dynamic behaviors in the analog domain.
Tanner EDA has completed the port of its HiPer Silicon design suite to work with the OpenAccess database, providing better interoperability with foundry process design kits (PDKs) and with other vendors’ IC design tools as well as providing better support for multiple users accessing the same design.
20nm design is fraught with problems for analog design but one that causes the biggest headaches is density variation, says Synopsys' Joachim Kunkel.
Cadence Design Systems has updated both of its printed circuit board (PCB) tools – Allegro and Orcad – to improve their handling of design constraints, multiuser design and deal with embedded components and mechanical CAD tools.
View All Sponsors