Vehicle-maker Volkswagen is putting its weight behind a set of microcontroller benchmarks that focus on energy consumption rather than performance.
Jasper Design Automation's modular concept moves into a hot area in SoC design to verify specs are still met after power management circuitry is inserted.
The fifth generation of Forte Design System's Cynthesizer tool is a slice of system-level evangelism.
Scale-out computing has demands so different from conventional applications that it could reshape the way to design one class of multicore processors.
With both now more dependent on foundry business for their finFET (trigate) and FDSOI offerings, DATE was a chance to push their innovations in low power.
Four of the European centers for electronics research and business development have set up a project to try to create a virtual “silicon cluster” that aims ultimately to build a worldwide development network for energy-efficient systems.
Docea Power extends power and thermal analysis tools to address complexity and sub-dividing responsibilities among architects.
As DVCon begins, we interview Cadence's Qi Wang, who has led its efforts to converge the Common Power Format with its rival as the IEEE1801 standard is revamped.
ISSCC expert panel highlights lowering power over energy sources and identifies the need to focus on the product rather than the technology
Intel has launched its first server SoC, based on a stripped-down Atom, in a bid to seal its place in microservers before ARM can ready its 64bit architecture for production. But the chip seems more a stake in the ground than the answer for low-power servers.
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