IR drop


February 1, 2019

Fast process access gets Moortec onto 7nm

Early access to tools for new processes is helping Moortec deliver IP to determine the real-time health of on-chip circuits.
May 23, 2016

Cloud analysis comes to power grid design

Ansys has decided to marry cloud computing with some of the tools used in SoC design that can make use of large amounts of temporary computer power.
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August 5, 2014

Cadence takes Voltus to transistor level

Cadence Design Systems has introduced a variant of Voltus that runs transistor-level simulations to check for electromigration and IR-drop problems.
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November 12, 2013

Cadence ties IR drop into static timing analysis

Cadence Design Systems uses parallelism in its Voltus tool to provide faster IR drop analysis and bridge static timing and IC-level power-integrity analysis.
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October 9, 2013

Cadence parallelizes FastSpice for large-scale mixed-signal checks

Cadence Design Systems has developed a version of its Spectre FastSpice tool that splits simulation across many computers without manually cutting the design into segments.
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