functional safety

April 6, 2017

Leverage AI and centralized processing for L-5 autonomous vehicles

L-5 autonomous vehicles need centralized raw data analysis with machine learning to cope with the demands of ASIL-D functional safety. Mentor's response is DRS360.
March 7, 2017

Reducing the documentation burden in ISO 26262

The Mentor Safe program aims to increase automotive users' confidence in tools and provide documentation needed for the functional safety standard.
October 26, 2016

Cadence maps out safety plan for semiconductor-design tools

Cadence Design Systems is nearing completion of a program that will provide a portfolio of documentation for users of its tools who need to obtain safety approvals for their designs.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations:
September 20, 2016

Debut for safety-critical ARMv8 core

ARM has launched the first of its Cortex-R series of processors to be based on the v8R architecture, providing greater protection for software tasks from each other.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , , , , ,   |  Organizations:
September 14, 2016

Event: How ISO 26262 is driving automotive DFT requirements

Webinar explores the impact of ISO 26262 on DFT requirements, and what is being learnt from the introduction of the standard at ON Semiconductor.
July 12, 2016

Synopsys speeds ATPG, adds ISO 26262 certification

Synopsys has introduced TetraMAX II, a faster and more parallelisable ATPG and diagnostics solution, which is now also certified for use in ISO 26262 compliant automotive designs.
May 5, 2016

Functional safety and high reliability for FPGA designs – eight videos show you how

Videos detail techniques to improve the functional safety and reliability of FPGA designs, including the implementation of triple modular redundancy, safe FSM schemes and self monitoring.
Article  |  Topics: Blog - EDA, Embedded, - General  |  Tags: , , , , , ,   |  Organizations:
April 5, 2016

Cadence moves into safer design with Virtuoso changes

Cadence Design Systems has made additions to its Virtuoso mixed-signal design environment intended to improve design for manufacture and the ability of teams to create and test safety-critical systems.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
June 8, 2015

Synopsys speeds automotive SoC qualification with IP launch

Synopsys develops portfolio of ASIL B ready IP, and invests in AEC-Q100 testing and TS 16949 quality management, to ease automotive SoC qualification.
Article  |  Topics: Blog - IP  |  Tags: , , , , , , ,   |  Organizations: , ,
June 7, 2015

OneSpin brings formal to bear on ISO 26262 fault tracing

OneSpin Solutions has used its formal-verification technology as the basis for an app intended for ISO 26262 projects that analyzes the ability of a design to deal with fault conditions.

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