FPGA

December 6, 2018

Microchip opts for RISC-V cores in SoC FPGA

Microsemi has put multiple RISC-V cores into a new generation of SoC FPGAs, intended for embedded systems that need to run Linux.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , ,   |  Organizations: ,
October 17, 2018

FPGA playing verification catch-up as bugs escape

The latest Mentor-commissioned Wilson Research Group study on ASIC and FPGA verification highlights technique adoption and maturity.
Article  |  Topics: Verification  |  Tags: , , , , , ,   |  Organizations: ,
July 16, 2018

Embedded FPGAs start to take hold in SoC

The embedded FPGA is beginning to find a market, with communications leading the way but machine learning likely to drive further adoption.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: ,
May 11, 2018

Mixed-signal circuits push scaled CMOS at VLSI

The circuits sessions at mid-June's VLSI Symposia in Honolulu feature a number of papers that improve the performance of scaled mixed-signal processes.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations: , ,
March 19, 2018

Xilinx plans reconfigurable compute for 7nm FPGA generation

Xilinx plans to make reconfigurable computing the focus of its upcoming generation of FPGAs, which will be made on a 7nm finFET process at TSMC and expected to start sampling next year.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , , ,   |  Organizations:
February 25, 2018

55th DAC features design contest to build smarter drones

June's DAC will see the culmination of a contest involving more than 100 teams vying to demonstrate the best use of machine learning on embedded hardware in a flying drone.
Article  |  Topics: Blog - Embedded  |  Tags: , , , ,   |  Organizations: ,
February 15, 2018

FPGA powers custom RF tests on low-cost module

Slovenian startup Red Pitaya has added a front-end module and firmware to its FPGA-based StemLab board to create a customizable vector network analyzer (VNA) and RF tester.
Article  |  Topics: Blog - Embedded  |  Tags: , , , , , ,
September 12, 2017

Group to build CCIX accelerator test chip

ARM, Xilinx, Cadence Design Systems, and TSMC have agreed to produce a test chip for the CCIX project.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: , , ,
June 16, 2017

DAC 2017 preview: Plunify

Plunify will demonstrate its new Kabuto tool that recommends RTL fixes for FPGA designs at the Design Automation Conference.
Article  |  Topics: Blog Topics  |  Tags: , , ,   |  Organizations: ,
June 15, 2017

Microsemi builds Windows IDE for RISC-V

Semiconductor supplier Microsemi has used the Eclipse open-source IDE platform to develop a Windows-based toolchain for CPUs that supports the RISC-V instruction set.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , ,   |  Organizations:

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