Microsemi has put multiple RISC-V cores into a new generation of SoC FPGAs, intended for embedded systems that need to run Linux.
The latest Mentor-commissioned Wilson Research Group study on ASIC and FPGA verification highlights technique adoption and maturity.
The embedded FPGA is beginning to find a market, with communications leading the way but machine learning likely to drive further adoption.
The circuits sessions at mid-June's VLSI Symposia in Honolulu feature a number of papers that improve the performance of scaled mixed-signal processes.
Xilinx plans to make reconfigurable computing the focus of its upcoming generation of FPGAs, which will be made on a 7nm finFET process at TSMC and expected to start sampling next year.
June's DAC will see the culmination of a contest involving more than 100 teams vying to demonstrate the best use of machine learning on embedded hardware in a flying drone.
Slovenian startup Red Pitaya has added a front-end module and firmware to its FPGA-based StemLab board to create a customizable vector network analyzer (VNA) and RF tester.
ARM, Xilinx, Cadence Design Systems, and TSMC have agreed to produce a test chip for the CCIX project.
Plunify will demonstrate its new Kabuto tool that recommends RTL fixes for FPGA designs at the Design Automation Conference.
Semiconductor supplier Microsemi has used the Eclipse open-source IDE platform to develop a Windows-based toolchain for CPUs that supports the RISC-V instruction set.
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