finFET

SureCore picks up grant for low-power, nanometer SRAM IP

Physical-IP startup SureCore has been awarded $380,000 to build a demo chip for a low-power SRAM design the company is aiming at finFET and FD-SOI processes.
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DAC 2013 Preview II: Panels

FinFETs, ever proliferating verification, 3DIC, security and more feature on our guide to some of the most intriguing panels at DAC 2013.

DAC 2013 Preview I: Putting users first and marking 50 years

In the first of our weekly DAC 2013 previews, we discuss program highlights with general chair Yervant Zorian, including an expanded Designer Track, keynotes and golden jubilee celebrations.

DATE: Intel and ST stake claims to foundry low power designs

With both now more dependent on foundry business for their finFET (trigate) and FDSOI offerings, DATE was a chance to push their innovations in low power.

DATE: ARM proposes ‘unit of compute’ as basis for energy-efficient systems

ARM CPU chief proposes 'unit of compute' as building block fro energy-efficient computation systems
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DATE: Double patterning and finFETs force flexibility on tools

EDA companies are having to plan for the different ways in which double patterning and finFETs could move into fabs, Antun Domic of Synopsys explains.
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DATE: Early shift to finFET processes challenges IP development strategies

An early shift to finFET processes is making developing IP libraries more challenging.
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GlobalFoundries and Samsung talk finFET progress at CPTF

GlobalFoundries and Samsung described how they are readying finFETs for production at CPTF 2013 and how the 28nm processes will have a long shelf life.
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The silicon industry’s crunch time

Future Horizon’s forecast meeting for the first half of 2013 made it clear how the electronics sector and the semiconductor industry in particular is facing big problems.
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Samsung lines up tool providers for finFET tapeouts

14nm finFET test-chip designs are moving through Samsung's fab as ARM, Cadence Design Systems and Synopsys continue to check their flows on the new process.
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