FD-SOI

December 18, 2023

FD-SOI processes lead to double-decker monolithic 3D

At IEDM, CEA-Leti described a process that avoids the thermal problems of implementing CMOS transistors in the metal stack using monolithic integration.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
November 14, 2022

Semiwise brings cryogenic models to SOI

Semiwise has developed transistor models for the GlobalFoundries 22FDX that cover operation at cryogenic temperatures.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: ,
September 5, 2022

Parasitic extraction challenges intensify for 5G

5G IC designs have needed aggressive innovation across many elements and more use of FD-SOI that both pose parasitic extraction challenges.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , , , , , ,   |  Organizations:
July 2, 2019

The road to ES Design West: Location, location, location

There's still plenty of time to build a busy and profitable agenda for a visit to ES Design West and SEMICON West in San Francisco next week.
April 12, 2019

DesignWare gets automotive boost with GLOBALFOUNDRIES 22FDX SOI qualification

Synopsys and GLOBALFOUNDRIES are developing a portfolio of automotive IP for the chipmakerā€™s 22nm fully depleted silicon-on-insulator (22FDX) process.
Article  |  Topics: Blog - IP  |  Tags: , , , ,
August 28, 2018

GlobalFoundries stops 7nm work to focus on existing processes

GlobalFoundries has decided to put development of its 7nm process on the backburner and focus on its existing finFET and FD-SOI processes.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , , , ,   |  Organizations:
July 12, 2018

With RF, power and MRAM, FD-SOI finds its role

FD-SOI is gradually building up a presence as a technology not just for low-power but RF and power integration.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , , , ,   |  Organizations: , , ,
July 11, 2018

Leti and Soitec partner for wafer development

Research institute Leti and Soitec have decided to team up to work on a new generation of engineered substrates, such as specialized SOI wafers.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
September 21, 2017

GlobalFoundries adds 12nm finFET process

GlobalFoundries intends to offer a 12nm FinFET process as a stepping stone from its 14nm process.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations: ,
June 27, 2017

Sonics adds heat-aware DVFS to SoC power controller

Sonics has developed a version of its power-management IP core for SoCs that adds support for dynamic voltage and frequency scaling, along with the ability to tune settings according to temperature.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations: ,

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