ESL

The Mentor chief discusses ESL-based low power, emulation, 32nm to 20nm and using tools in the cloud.

Verification drives system-level adoption as sales leap 76%. Virtual prototyping is also on the rise but there are gaps in the tool-set.

At last year’s DAC, leading EDA analyst Gary Smith said chip design had run into a big problem: it was already too expensive to be worthwhile for most companies. Soon afterwards, three companies rang to tell him that the figures were too pessimistic: it was not costing in the region of $75m but perhaps just […]

Attendance at DAC’s sister conference, Design Automation and Test in Europe (DATE), rose this year by just under 10 per cent for its first visit to Grenoble, France. Given that the recession is still crimping business travel, that’s no bad claim. But, as much as DATE reflects the health of European design, it also provides […]