Strato emulator family adds modular boxes that can build from 640K and 1.25B gate-counts for automotive, mil/aero markets and 'digital twin' strategies.
Ceva has decided to include neural network, vector processing and customized instruction sets in an IP platform for 5G NR terminals.
Ceva's latest iteration of its XC architecture aims at the intensive DSP required for 5G basestations.
Xilinx plans to add high-speed analog interfaces to its upcoming FPGAs to better support high-density 5G basestation designs.
Achronix has decided to offer the FPGA technology it has developed as a set of embeddable cores.
ARM and Ceva have both aimed at the need for to juggle control code and DSP in the upcoming LTE-Advanced and 5G with their latest processor core architectures.
High peak-to-average ratios inherent in 4G/5G modulation schemes are driving the circuitry controlling RF PAs to become more modeling-oriented.
Nokia Siemens Networks has built an instrument able to handle bandwidths up 1GHz to investigate the use of milllimeter-band radio for 5G communications.
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