3DIC

February 1, 2024

Future Facilities core drives Cadence thermal suite

Cadence has introduced a platform for performing thermal and thermal-stress analysis of subsystems, from 2.5D and 3DICs to PCBs and complete electronic assemblies.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , ,   |  Organizations:
December 22, 2023

Sustainability work puts numbers on chipmaking production at IEDM

Shifting to low-carbon generation for electricity would do much to cut the carbon footprint of semiconductor processes according to work shown at this year’s IEDM.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: , ,
November 20, 2023

ETRI builds flow for AI chiplets

South Korea's leading research institute has built a reusable flow for lower power petaflops-performance AI.
Article  |  Topics: Blog - EDA, - HPC, Next Generation Design, Packaging, Verification  |  Tags: , , ,   |  Organizations: , ,
October 25, 2023

Image sensors shrink at IEDM

This year’s IEDM features a number of papers that seek to drive down the size and boost the performance of image sensors.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , , , , ,
October 25, 2023

VLSI Symposium 2024 looks to bridge digital and physical

The IEEE Symposium on VLSI Technology & Circuits switches back to Honolulu for its 44th year in the summer of next year and has issued its call for papers, with a deadline of early February for contributions.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,
October 24, 2023

Flow evolution for the 3DIC/chiplet age

Chiplet-based 3DIC designs present new challenges for flows that integrate tasks from design exploration to physical verification.
January 4, 2023

A*Star lays out SiP applications choices at IEDM

The choices for heterogeneous integration are falling into three main families, demonstrated by A*Star at IEDM 2022.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
June 20, 2022

3DIC design needs more hierarchy, TSMC says

TSMC calls for modular EDA flows and increased use of hierarchical verification to support complex 3DIC designs.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
March 23, 2022

Nvidia open to chiplet standards

Nvidia says it will support the UCIe chiplet interface standard once it has "stabilized" while opening up its latest form of NVLink to other companies.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations:
December 31, 2021

AMD moves gradually into 3D integration

At December's Design Automation Conference, AMD senior vice president Sam Naffziger provided more insights into the chipmaker’s use of chiplet-based design and manufacture.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , , , , , ,   |  Organizations:

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