February 1, 2024
Cadence has introduced a platform for performing thermal and thermal-stress analysis of subsystems, from 2.5D and 3DICs to PCBs and complete electronic assemblies.
December 22, 2023
Shifting to low-carbon generation for electricity would do much to cut the carbon footprint of semiconductor processes according to work shown at this year’s IEDM.
November 20, 2023
South Korea's leading research institute has built a reusable flow for lower power petaflops-performance AI.
October 25, 2023
This year’s IEDM features a number of papers that seek to drive down the size and boost the performance of image sensors.
October 25, 2023
The IEEE Symposium on VLSI Technology & Circuits switches back to Honolulu for its 44th year in the summer of next year and has issued its call for papers, with a deadline of early February for contributions.
October 24, 2023
Chiplet-based 3DIC designs present new challenges for flows that integrate tasks from design exploration to physical verification.
January 4, 2023
The choices for heterogeneous integration are falling into three main families, demonstrated by A*Star at IEDM 2022.
June 20, 2022
TSMC calls for modular EDA flows and increased use of hierarchical verification to support complex 3DIC designs.
March 23, 2022
Nvidia says it will support the UCIe chiplet interface standard once it has "stabilized" while opening up its latest form of NVLink to other companies.
December 31, 2021
At December's Design Automation Conference, AMD senior vice president Sam Naffziger provided more insights into the chipmaker’s use of chiplet-based design and manufacture.